Index of /files/Udemy/Udemy - High-Level Synthesis for FPGA, Part 2 - Sequential Circuits 2022-1/3. D Flip-Flop (DFF)/
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1. Introduction.mp4 02-Apr-2021 09:20 71445955
1. Introduction.srt 02-Apr-2021 09:20 4503
1.1 DFF-Introduction-QuizSolution.pdf 02-Apr-2021 09:20 117080
10. Exercises.html 02-Apr-2021 09:24 1806
10.1 exercise02.zip 02-Apr-2021 09:24 2101
10.2 exercise01.zip 02-Apr-2021 09:24 1788
10.3 DFF-Exercises-Solution.pdf 02-Apr-2021 09:24 664653
10.4 exercise03.zip 02-Apr-2021 09:24 2155
2. Memory Cell.mp4 02-Apr-2021 09:21 73583484
2. Memory Cell.srt 02-Apr-2021 09:21 4369
2.1 DFF-MemoryCell-Quiz-Solution.pdf 02-Apr-2021 09:21 139843
3. Sequential Circuits.mp4 02-Apr-2021 09:21 106358400
3. Sequential Circuits.srt 02-Apr-2021 09:21 6650
3.1 DFF-SequentialCircuits-Quiz-Solution.pdf 02-Apr-2021 09:21 176427
4. Clock Signal.mp4 02-Apr-2021 09:22 88325165
4. Clock Signal.srt 02-Apr-2021 09:22 5911
4.1 DFF-ClockSignal-Quiz-Solution.pdf 02-Apr-2021 09:22 242968
5. State Concept.mp4 02-Apr-2021 09:22 67355782
5. State Concept.srt 02-Apr-2021 09:22 4094
5.1 DFF-StateConcept-quiz-solution.pdf 02-Apr-2021 09:22 168098
6. Reset Signal.mp4 02-Apr-2021 09:23 81718585
6. Reset Signal.srt 02-Apr-2021 09:23 5270
6.1 DFF-ResetSignal-Quiz-Solution.pdf 02-Apr-2021 09:23 212415
7. Register.mp4 02-Apr-2021 09:23 70267114
7. Register.srt 02-Apr-2021 09:23 4252
7.1 DFF-Register-Quiz-Solution.pdf 02-Apr-2021 09:23 236874
8. DFF LAB01.mp4 02-Apr-2021 09:23 81299461
8. DFF LAB01.srt 02-Apr-2021 09:23 7895
8.1 dffs-lab01-files.zip 02-Apr-2021 09:23 1294
8.2 DFF-LAB01-Quiz-Solution.pdf 02-Apr-2021 09:23 142059
9. DFF LAB02.mp4 02-Apr-2021 09:24 82713217
9. DFF LAB02.srt 02-Apr-2021 09:24 5334
9.1 dffs-lab02-files.zip 02-Apr-2021 09:24 1353
9.2 DFF-LAB02-Quiz-Solution.pdf 02-Apr-2021 09:24 128077
9.3 quiz-left_register-vitishls-files.zip 02-Apr-2021 09:24 1473