Index of /files/Udemy/Udemy - High-Level Synthesis for FPGA, Part 2 - Sequential Circuits 2022-1/5. Testbench 01/

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1. Introduction.mp4                                02-Apr-2021 09:28            51262636
1. Introduction.srt                                02-Apr-2021 09:28                3033
2. Definition.mp4                                  02-Apr-2021 09:28            81020848
2. Definition.srt                                  02-Apr-2021 09:28                5191
2.1 Testbench-Definition-Quiz-Solution.pdf         02-Apr-2021 09:28               91575
3. Parallel to Serial Testbench.mp4                02-Apr-2021 09:28            52528759
3. Parallel to Serial Testbench.srt                02-Apr-2021 09:28                4052
3.1 parallel2serial-vitishls-files.zip             02-Apr-2021 09:28                4412
3.2 Parallel2Serial-Testbench-Quiz-Solution.pdf    02-Apr-2021 09:29              260976
4. Serial to Parallel Testbench.mp4                02-Apr-2021 09:29            82482992
4. Serial to Parallel Testbench.srt                02-Apr-2021 09:29                6461
4.1 Serial2Parallel-Testbench-Quiz-Solution.pdf    02-Apr-2021 09:29              177853
4.2 serial2parallel-vitishls-files.zip             02-Apr-2021 09:29                4618
5. Input Waveform.mp4                              02-Apr-2021 09:29            82707278
5. Input Waveform.srt                              02-Apr-2021 09:29                5825
5.1 Testbench-InputWaveform-Quiz-Solution.pdf      02-Apr-2021 09:29              190550
5.2 simple_circuit-quiz-vitishls-files.zip         02-Apr-2021 09:29                2423
6. Exercises.html                                  02-Apr-2021 09:29                1094
6.1 exercise01.zip                                 02-Apr-2021 09:29                2711
6.2 Testbench-Exercises-Solution.pdf               02-Apr-2021 09:30              313600
6.3 exercise02.zip                                 02-Apr-2021 09:30                4849