1- Consider the following simple design in HLS.

#include <ap_int.h>

void simple_design_02(bool start, bool input1, bool input2, bool &output) {
#pragma HLS INTERFACE ap_ctrl_none port=return
#pragma HLS INTERFACE ap_none port=output
#pragma HLS INTERFACE ap_none port=input1
#pragma HLS INTERFACE ap_none port=input2

  static ap_uint<2> state = 0;

  if (start) {
    state = ((ap_uint<1>)input2, (ap_uint<1>)input1);
  }

  output = state.xor_reduce();
}

Write a testbench to generate the following waveform diagram.

2- Consider the following logic circuit

Describe the circuit in HLS and write a testbench for evaluating its functionality.