Index of /files/Udemy/Udemy - High-Level Synthesis for FPGA, Part 1-Combinational Circuits 2022-1/11. Combinational Loops/

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1. Introduction.mp4                                24-Nov-2020 00:20            52671182
1. Introduction.srt                                24-Nov-2020 00:20                3743
10. Exercises.html                                 24-Nov-2020 01:00                 452
10.1 CombinationalLoop-Exercises-01.zip            24-Nov-2020 01:00                4968
10.1 CombinationalLoop-Exercises-Solution.pdf      24-Nov-2020 00:40              348905
10.2 CombinationalLoop-Exercises-02.zip            24-Nov-2020 00:40                4708
10.2 CombinationalLoop-Exercises-Solution.pdf      24-Nov-2020 01:00              348905
10.3 CombinationalLoop-Exercises-02.zip            24-Nov-2020 01:00                4708
10.3 CombinationalLoop-Exercises-03.zip            24-Nov-2020 00:40                4721
10.4 CombinationalLoop-Exercises-01.zip            24-Nov-2020 00:40                4968
10.4 CombinationalLoop-Exercises-03.zip            24-Nov-2020 01:00                4721
2. Definition.mp4                                  24-Nov-2020 01:00            86043063
2. Definition.srt                                  24-Nov-2020 00:38                7179
2.1 CombinationalLoop-Definition-Quiz.pdf          24-Nov-2020 00:38              343529
3. Loop Unroll.mp4                                 24-Nov-2020 00:38            51457966
3. Loop Unroll.srt                                 24-Nov-2020 00:38                3758
3.1 CombinationalLoop-Unroll-Quiz.pdf              24-Nov-2020 00:38              156184
4. Loop Unroll Conditions.mp4                      24-Nov-2020 00:39            56935762
4. Loop Unroll Conditions.srt                      24-Nov-2020 00:39                3825
4.1 CombinationalLoop-Unroll-Conditions-Quiz.pdf   24-Nov-2020 00:39              172784
5. Parity Bit Definition.mp4                       24-Nov-2020 00:39            73078390
5. Parity Bit Definition.srt                       24-Nov-2020 00:39                4699
5.1 CombinationalLoop-ParityBit-Definition-Quiz..> 24-Nov-2020 00:39               96109
6. Parity Bit Design.mp4                           24-Nov-2020 00:39            43123874
6. Parity Bit Design.srt                           24-Nov-2020 00:39                2527
6.1 CombinationalLoop-ParityBit-Design-Quiz.pdf    24-Nov-2020 00:39              219727
7. Parity Bit Design Optimisation.mp4              24-Nov-2020 00:40            49400752
7. Parity Bit Design Optimisation.srt              24-Nov-2020 00:40                2932
7.1 CombinationalLoop-ParityBit-Design-optimiza..> 24-Nov-2020 00:40              175050
8. Parity Bit HLS.mp4                              24-Nov-2020 00:40            68664474
8. Parity Bit HLS.srt                              24-Nov-2020 00:40                4421
8.1 CombinationalLoop-ParityBit-HLS-Quiz-Soluti..> 24-Nov-2020 00:40              162897
9. Parity Bit Vivado-HLS.mp4                       24-Nov-2020 00:40            60258195
9. Parity Bit Vivado-HLS.srt                       24-Nov-2020 00:40                5471
9.1 CombinationalLoop-ParityBit-Vivado-HLS -Qui..> 24-Nov-2020 00:40              126523
9.2 parity_generator-files.zip                     24-Nov-2020 00:40                1694