Index of /files/Udemy/Udemy - High-Level Synthesis for FPGA, Part 1-Combinational Circuits 2022-1/5. Basic InputOutput/
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1. Introduction.mp4 24-Nov-2020 00:03 48925226
1. Introduction.srt 24-Nov-2020 00:03 3264
2. Configuration.mp4 24-Nov-2020 00:04 33258714
2. Configuration.srt 24-Nov-2020 00:04 2069
2.1 Basic-InputOutput-Configuration-Quiz-Soluti..> 24-Nov-2020 00:04 265696
3. Controller Concept.mp4 24-Nov-2020 00:04 37301399
3. Controller Concept.srt 24-Nov-2020 00:04 2521
3.1 Basic-InputOutput-Controller-Concept-Quiz-S..> 24-Nov-2020 00:04 81242
4. HLS Ports.mp4 24-Nov-2020 00:04 78404038
4. HLS Ports.srt 24-Nov-2020 00:04 6156
4.1 Basic-InputOutput-HLS-Ports-Quiz-Solution.pdf 24-Nov-2020 00:04 120890
5. HLS LAB.mp4 24-Nov-2020 00:04 47115441
5. HLS LAB.srt 24-Nov-2020 00:04 4004
5.1 Basic-InputOutput-HLS-LAB-Quiz-Solution.pdf 24-Nov-2020 00:04 184502
6. Vivado LAB.mp4 24-Nov-2020 00:04 84981543
6. Vivado LAB.srt 24-Nov-2020 00:04 5630
7. Exercise.html 24-Nov-2020 00:59 1734
7.1 Basic-InputOutput-Exercises-Solution.pdf 24-Nov-2020 00:59 411937
7.1 basic_inout_exercise_02.zip 24-Nov-2020 00:04 1695
7.2 Basic-InputOutput-Exercises-Solution.pdf 24-Nov-2020 00:37 411937
7.2 basic_inout_exercise_01.zip 24-Nov-2020 00:04 1745
7.2 basic_inout_exercise_03.zip 24-Nov-2020 00:59 1796
7.3 basic_inout_exercise_02.zip 24-Nov-2020 00:59 1695
7.3 basic_inout_exercise_03.zip 24-Nov-2020 00:04 1796
7.4 Basic-InputOutput-Exercises-Solution.pdf 24-Nov-2020 00:04 411937
7.4 basic_inout_exercise_01.zip 24-Nov-2020 00:37 1745