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What is the HLS design overall structure of a possible logic design that sends the states of switches to 
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LEDs? Here
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I am going to explain this overall structure.
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The design inside an FPGA should read the switches’ states and sent them to LEDs without any processing. 
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Therefore, the hardware design is just a couple of simple connections. 
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The circuit design inside the FPGA is just a bunch of wires. 
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This circuit should be described by a C/C++ function in HLS. 
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Also, we need a set of constraints that describes the connection between the FPGA I/O pins and the design 
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parts.
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As I explained in the previous section, ports and interfaces are playing a crucial role in HLS. 
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Now the question is, What are suitable interfaces for the ports in our simple input/output example?
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In the next lecture, I will talk a little bit more about the concept of ports in HLS and the suitable 
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interfaces for our current design example.
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These are our takeaway messages: Our FPGA design has five parts 1-Switches as a peripheral that generates 
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data. 2-LEDs as a peripheral that consumes data.3- Connections between peripherals and the FPGA
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4- The design itself 5- Connections between FPGA I/O pins and the design ports. Peripherals and their connections 
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are on board.
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Design and its connection to I/Op pins are inside the FPGA
An HLS C function can describe the design functionality.
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A set of constraints describes the connection between design ports and FPGA I/O pins.
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This is the quiz question for this lecture.
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Can we describe a circuit design and the connection between its ports and the FPGA I/O pins in an HLS 
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C function?