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Ports and interfaces are playing a crucial role in HLS. 
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Now the question is,  What are the suitable interfaces for the ports in our simple input/output example?
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In the next lecture, 
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I am going to handle this question.
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Let's develop the C function that connects switches to LEDs in our simple input/output example. First, 
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as we are going to read and write 8 bits of data, 
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let's consider the unsigned char as our data type.
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Also, we use function arguments to receive and send data.
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So the function looks like this. 
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It has two arguments. The argument that returns data is defined as a pointer. Now, the function body 
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is as simple as a single assignment. 
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The synthesis tool translates this individual assignment into a set of wires that connect the inputs 
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to the outputs.  Before adding interface pragmas to this code, 
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let's talk about the function hierarchy in HLS.
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Each hardware module described in C/C++ can have multiple functions calling each other. 
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However, only one function is called top-function. 
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Other functions should be invoked through this top-function, directly or by other functions under the top-
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function.
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This diagram shows the function call graph, which has only one root, that is the top function. 
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The top-function arguments are the hardware ports through which the module communicate with the rest of 
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the systems.
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Therefore, these arguments should be synthesised into digital circuits that provide suitable signalling 
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for the communication considered for each port. Such as serial communication, synchronise communication
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and accessing an external memory with a specific communication protocol, just to name a few.
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This synthesis process is called interface synthesis. 
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The Vivado-HLS tool performs this interface synthesis automatically. Users should only mention 
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the type of the protocol which should be supported by the synthesised interface.
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An interface assigned to a port can have different modes. Each mode defines a protocol and its associated 
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signaling for data exchange.
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Here it is the list of modes of an interface available in vivado-HLS. 
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I will explain some of them throughout this course.
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And these figures show the signalling associated with three modes, 
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as can be seen, a port can have a simple or a sophisticated hardware implementation.  If the communication
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is very naive via simple wires without any specific signalling, which is the case in combinational
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circuits, the interface mode (or type) would be ap_none.
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The HLS tool packages the synthesised hardware into an IP (intellectual property). This IP can have a 
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few block-level signals to control the functionality of the modules such as start, done, clock, reset,
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etc..
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This should be defined as an interface assigned to the top-function in the C description. 
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As for a combinational circuit, we don't have such signals 
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the type (or mode) of this interface is ap_ctrl_none. Other block-level interface modes add more 
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signals to the design to control its activation states.
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Ok, let's go back to our design	 and add the interface related directives to our top-function. 
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We need an interface for each function argument and one for the function itself. Whereas the argument names 
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are used as the name of their related ports, the port name of the function, in vivado-HLS, is the return keyword.
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Another way to implement our example is by using a function with one argument and a return value. 
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Here is the function with its interfaces directives.
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Notice that a top-function in HLS cannot return a pointer value. That's not synthesisable.
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In the next lecture, I will explain how to implement our design C function in vivado-HLS.
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These are our takeaway messages. Each HLS hardware description can have only one top-function,
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Only an argument in the top function requires an associated interface
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There is also a block-level interface assigned to the top-function 
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Now the quiz of this lecture. Add interfaces pragmas to this top-level function.