Index of /files/Udemy/Udemy - Embedded System Design with Xilinx ZYNQ SoC and SDK 2022-11/4. Getting started with Intermediate Drivers UARTPS/

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1. Agenda.mp4                                      31-Jul-2023 21:21              898105
1. Agenda.srt                                      31-Jul-2023 21:21                 515
10. EMIO  Using AXI UARTLITE P2.mp4                31-Jul-2023 21:21           127571267
10. EMIO  Using AXI UARTLITE P2.srt                31-Jul-2023 21:21               20459
11. EMIO  Using AXI UARTLITE P3.mp4                31-Jul-2023 21:21            22624328
11. EMIO  Using AXI UARTLITE P3.srt                31-Jul-2023 21:21                3845
2. Overview.mp4                                    31-Jul-2023 21:21            28847020
2. Overview.srt                                    31-Jul-2023 21:21                7799
3. UART with MIO P1.mp4                            31-Jul-2023 21:21            44803924
3. UART with MIO P1.srt                            31-Jul-2023 21:21                8632
4. UART with MIO P2.mp4                            31-Jul-2023 21:21           125417891
4. UART with MIO P2.srt                            31-Jul-2023 21:21               19356
5. UART with MIO P3.mp4                            31-Jul-2023 21:21            86793175
5. UART with MIO P3.srt                            31-Jul-2023 21:21               12936
6. Code  UART MIO.html                             31-Jul-2023 21:21                1203
7. MIO  Using UART0 and PMOD to extend Capabili..> 31-Jul-2023 21:21            57901006
7. MIO  Using UART0 and PMOD to extend Capabili..> 31-Jul-2023 21:21                9254
8. EMIO  Performing connection to External Hard..> 31-Jul-2023 21:21            66689003
8. EMIO  Performing connection to External Hard..> 31-Jul-2023 21:21               12136
9. EMIO  Using AXI UARTLITE P1.mp4                 31-Jul-2023 21:21            30718892
9. EMIO  Using AXI UARTLITE P1.srt                 31-Jul-2023 21:21                6805