Device Usage Page (usage_statistics_webtalk.html)

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software_version_and_target_device
date_generatedSat Apr 22 16:48:54 2017 product_versionVivado v2015.4 (64-bit)
build_version1412921 os_platformWIN64
registration_id211139803_0_0_561 tool_flowVivado
betaFALSE route_designTRUE
target_familyzynq target_devicexc7z020
target_packageclg400 target_speed-2
random_idfa2d7df0d966501b95ccc4b479e89299 project_id374de835f5eb44f7a4343b4a407174dd
project_iteration9

user_environment
os_nameMicrosoft Windows 7 , 64-bit os_releaseService Pack 1 (build 7601)
cpu_nameIntel(R) Core(TM) i7-2630QM CPU @ 2.00GHz cpu_speed1995 MHz
total_processors1 system_ram6.000 GB

vivado_usage
project_data
srcsetcount=10 constraintsetcount=1 designmode=RTL prproject=false
reconfigpartitioncount=0 reconfigmodulecount=0 hdproject=false partitioncount=0
synthesisstrategy=Vivado Synthesis Defaults implstrategy=Vivado Implementation Defaults currentsynthesisrun=synth_1 currentimplrun=impl_1
totalsynthesisruns=1 totalimplruns=1 core_container=false
other_data
guimode=2

unisim_transformation
pre_unisim_transformation
bufg=1 carry4=27 fdce=79 fdre=342
fdse=21 gnd=277 ibuf=5 lut1=31
lut2=49 lut3=62 lut4=229 lut5=80
lut6=172 lut6_2=79 muxf7=32 obuf=16
ram32x1d=64 ramb36e1=16 srl16e=46 vcc=77
xadc=1
post_unisim_transformation
bufg=1 carry4=27 fdce=79 fdre=342
fdse=21 gnd=277 ibuf=5 lut1=31
lut2=49 lut3=62 lut4=229 lut5=159
lut6=251 muxf7=32 obuf=16 ramb36e1=16
ramd32=128 srl16e=46 vcc=77 xadc=1

power_opt_design
usage
slice_registers_augmented=0 slice_registers_newly_gated=0 slice_registers_total=378 srls_augmented=0
srls_newly_gated=0 srls_total=46 bram_ports_augmented=0 bram_ports_newly_gated=0
bram_ports_total=32 flow_state=default
command_line_options_spo
-clocks=default::[not_specified] -include_cells=default::[not_specified] -exclude_cells=default::[not_specified] -cell_types=default::all

ip_statistics
Hex_to_7_Seg/1
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=Hex_to_7_Seg x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED
Hex_to_7_Seg/2
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=Hex_to_7_Seg x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED
Hex_to_7_Seg/3
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=Hex_to_7_Seg x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED
Hex_to_7_Seg/4
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=Hex_to_7_Seg x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED
Hex_to_7_Seg/5
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=Hex_to_7_Seg x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED
IP_Integrator/1
iptotal=1 core_container=NA x_ipvendor=xilinx.com x_iplibrary=BlockDiagram
x_ipname=design_1 x_ipversion=1.00.a x_iplanguage=VHDL numblks=12
numreposblks=12 numnonxlnxblks=0 numhierblks=0 maxhierdepth=0
synth_mode=Global
Seg_Display_16/1
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=Seg_Display_16 x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED input_clk_freq=125000000 refresh_rate=50000
binary_bcd/1
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=user x_ipname=binary_bcd x_ipversion=1.0 x_ipcorerevision=2
x_iplanguage=VHDL x_ipsimlanguage=MIXED n=16
microblaze_mcs/1
iptotal=1 core_container=NA x_ipproduct=Vivado 2015.4 x_ipvendor=xilinx.com
x_iplibrary=ip x_ipname=microblaze_mcs x_ipversion=2.3 x_ipcorerevision=3
x_iplanguage=VHDL x_ipsimlanguage=MIXED c_family=zynq c_microblaze_instance=design_1_microblaze_mcs_1_0
c_avoid_primitives=0 c_path=mcs_0/U0 c_freq=125000000 c_memsize=65536
c_debug_enabled=0 c_jtag_chain=2 c_trace=0 c_use_io_bus=0
c_use_uart_rx=0 c_use_uart_tx=0 c_uart_baudrate=9600 c_uart_data_bits=8
c_uart_use_parity=0 c_uart_odd_parity=0 c_uart_rx_interrupt=0 c_uart_tx_interrupt=0
c_uart_error_interrupt=0 c_uart_prog_baudrate=0 c_use_fit1=0 c_fit1_no_clocks=6216
c_fit1_interrupt=0 c_use_fit2=0 c_fit2_no_clocks=6216 c_fit2_interrupt=0
c_use_fit3=0 c_fit3_no_clocks=6216 c_fit3_interrupt=0 c_use_fit4=0
c_fit4_no_clocks=6216 c_fit4_interrupt=0 c_use_pit1=0 c_pit1_size=32
c_pit1_readable=1 c_pit1_prescaler=0 c_pit1_interrupt=0 c_use_pit2=0
c_pit2_size=32 c_pit2_readable=1 c_pit2_prescaler=0 c_pit2_interrupt=0
c_use_pit3=0 c_pit3_size=32 c_pit3_readable=1 c_pit3_prescaler=0
c_pit3_interrupt=0 c_use_pit4=0 c_pit4_size=32 c_pit4_readable=1
c_pit4_prescaler=0 c_pit4_interrupt=0 c_use_gpo1=1 c_gpo1_size=7
c_gpo1_init=0x00000000 c_use_gpo2=1 c_gpo2_size=16 c_gpo2_init=0x00000000
c_use_gpo3=1 c_gpo3_size=7 c_gpo3_init=0x00000000 c_use_gpo4=0
c_gpo4_size=32 c_gpo4_init=0x00000000 c_use_gpi1=1 c_gpi1_size=16
c_gpi1_interrupt=0 c_use_gpi2=1 c_gpi2_size=1 c_gpi2_interrupt=0
c_use_gpi3=0 c_gpi3_size=32 c_gpi3_interrupt=0 c_use_gpi4=0
c_gpi4_size=32 c_gpi4_interrupt=0 c_intc_use_ext_intr=0 c_intc_intr_size=1
c_intc_level_edge=0x0000 c_intc_positive=0xFFFF c_intc_async_intr=0xFFFF c_intc_num_sync_ff=2
xadc_wiz_v3_2_0/1
iptotal=1 core_container=false component_name=design_1_xadc_wiz_1_1 enable_axi=false
enable_axi4stream=false dclk_frequency=125 enable_busy=true enable_convst=false
enable_convstclk=false enable_dclk=true enable_drp=true enable_eoc=true
enable_eos=true enable_vbram_alaram=false enable_vccddro_alaram=false enable_vccint_alaram=false
enable_vccaux_alaram=falseenable_vccpaux_alaram=false enable_vccpint_alaram=false ot_alaram=false user_temp_alaram=false
timing_mode=continuous channel_averaging=None sequencer_mode=off startup_channel_selection=single_channel

report_utilization
slice_logic
slice_luts_used=733 slice_luts_fixed=0 slice_luts_available=53200 slice_luts_util_percentage=1.38
lut_as_logic_used=565 lut_as_logic_fixed=0 lut_as_logic_available=53200 lut_as_logic_util_percentage=1.06
lut_as_memory_used=168 lut_as_memory_fixed=0 lut_as_memory_available=17400 lut_as_memory_util_percentage=0.97
lut_as_distributed_ram_used=128 lut_as_distributed_ram_fixed=0 lut_as_shift_register_used=40 lut_as_shift_register_fixed=0
slice_registers_used=378 slice_registers_fixed=0 slice_registers_available=106400 slice_registers_util_percentage=0.36
register_as_flip_flop_used=378 register_as_flip_flop_fixed=0 register_as_flip_flop_available=106400 register_as_flip_flop_util_percentage=0.36
register_as_latch_used=0 register_as_latch_fixed=0 register_as_latch_available=106400 register_as_latch_util_percentage=0.00
f7_muxes_used=32 f7_muxes_fixed=0 f7_muxes_available=26600 f7_muxes_util_percentage=0.12
f8_muxes_used=0 f8_muxes_fixed=0 f8_muxes_available=13300 f8_muxes_util_percentage=0.00
slice_used=242 slice_fixed=0 slice_available=13300 slice_util_percentage=1.82
slicel_used=156 slicel_fixed=0 slicem_used=86 slicem_fixed=0
lut_as_logic_used=565 lut_as_logic_fixed=0 lut_as_logic_available=53200 lut_as_logic_util_percentage=1.06
using_o5_output_only_used=0 using_o5_output_only_fixed= using_o6_output_only_used=402 using_o6_output_only_fixed=
using_o5_and_o6_used=163 using_o5_and_o6_fixed= lut_as_memory_used=168 lut_as_memory_fixed=0
lut_as_memory_available=17400 lut_as_memory_util_percentage=0.97 lut_as_distributed_ram_used=128 lut_as_distributed_ram_fixed=0
using_o5_output_only_used=0 using_o5_output_only_fixed= using_o6_output_only_used=128 using_o6_output_only_fixed=
using_o5_and_o6_used=0 using_o5_and_o6_fixed= lut_as_shift_register_used=40 lut_as_shift_register_fixed=0
using_o5_output_only_used=0 using_o5_output_only_fixed= using_o6_output_only_used=34 using_o6_output_only_fixed=
using_o5_and_o6_used=6 using_o5_and_o6_fixed= lut_flip_flop_pairs_used=824 lut_flip_flop_pairs_fixed=0
lut_flip_flop_pairs_available=53200 lut_flip_flop_pairs_util_percentage=1.55 fully_used_lut_ff_pairs_used=217 fully_used_lut_ff_pairs_fixed=
lut_ff_pairs_with_unused_lut_used=91 lut_ff_pairs_with_unused_lut_fixed= lut_ff_pairs_with_unused_flip_flop_used=516 lut_ff_pairs_with_unused_flip_flop_fixed=
unique_control_sets_used=27 minimum_number_of_registers_lost_to_control_set_restriction_used=94(Lost)
memory
block_ram_tile_used=16 block_ram_tile_fixed=0 block_ram_tile_available=140 block_ram_tile_util_percentage=11.43
ramb36_fifo_used=16 ramb36_fifo_fixed=0 ramb36_fifo_available=140 ramb36_fifo_util_percentage=11.43
ramb36e1_only_used=16 ramb18_used=0 ramb18_fixed=0 ramb18_available=280
ramb18_util_percentage=0.00
dsp
dsps_used=0 dsps_fixed=0 dsps_available=220 dsps_util_percentage=0.00
clocking
bufgctrl_used=1 bufgctrl_fixed=0 bufgctrl_available=32 bufgctrl_util_percentage=3.13
bufio_used=0 bufio_fixed=0 bufio_available=16 bufio_util_percentage=0.00
mmcme2_adv_used=0 mmcme2_adv_fixed=0 mmcme2_adv_available=4 mmcme2_adv_util_percentage=0.00
plle2_adv_used=0 plle2_adv_fixed=0 plle2_adv_available=4 plle2_adv_util_percentage=0.00
bufmrce_used=0 bufmrce_fixed=0 bufmrce_available=8 bufmrce_util_percentage=0.00
bufhce_used=0 bufhce_fixed=0 bufhce_available=72 bufhce_util_percentage=0.00
bufr_used=0 bufr_fixed=0 bufr_available=16 bufr_util_percentage=0.00
specific_feature
bscane2_used=0 bscane2_fixed=0 bscane2_available=4 bscane2_util_percentage=0.00
capturee2_used=0 capturee2_fixed=0 capturee2_available=1 capturee2_util_percentage=0.00
dna_port_used=0 dna_port_fixed=0 dna_port_available=1 dna_port_util_percentage=0.00
efuse_usr_used=0 efuse_usr_fixed=0 efuse_usr_available=1 efuse_usr_util_percentage=0.00
frame_ecce2_used=0 frame_ecce2_fixed=0 frame_ecce2_available=1 frame_ecce2_util_percentage=0.00
icape2_used=0 icape2_fixed=0 icape2_available=2 icape2_util_percentage=0.00
startupe2_used=0 startupe2_fixed=0 startupe2_available=1 startupe2_util_percentage=0.00
xadc_used=1 xadc_fixed=1 xadc_available=1 xadc_util_percentage=100.00
primitives
fdre_used=294 fdre_functional_category=Flop & Latch lut6_used=193 lut6_functional_category=LUT
lut5_used=181 lut5_functional_category=LUT lut4_used=164 lut4_functional_category=LUT
ramd32_used=128 ramd32_functional_category=Distributed Memory lut3_used=102 lut3_functional_category=LUT
lut2_used=83 lut2_functional_category=LUT fdce_used=63 fdce_functional_category=Flop & Latch
srl16e_used=46 srl16e_functional_category=Distributed Memory muxf7_used=32 muxf7_functional_category=MuxFx
carry4_used=27 carry4_functional_category=CarryLogic fdse_used=21 fdse_functional_category=Flop & Latch
ramb36e1_used=16 ramb36e1_functional_category=Block Memory obuf_used=16 obuf_functional_category=IO
lut1_used=5 lut1_functional_category=LUT ibuf_used=5 ibuf_functional_category=IO
xadc_used=1 xadc_functional_category=Others bufg_used=1 bufg_functional_category=Clock
io_standard
lvcmos25=0 mobile_ddr=0 lvttl=0 lvcmos18=0
pci33_3=0 lvcmos33=1 diff_sstl15_r=0 hstl_ii=0
lvcmos15=0 diff_sstl15=0 hstl_ii_18=0 hstl_i=0
diff_mobile_ddr=0 hsul_12=0 lvcmos12=0 diff_hsul_12=0
hstl_i_18=0 sstl18_i=0 sstl18_ii=0 sstl15=0
sstl15_r=0 sstl135=0 sstl135_r=0 lvds_25=0
diff_hstl_i=0 rsds_25=0 diff_hstl_ii=0 tmds_33=0
diff_hstl_i_18=0 mini_lvds_25=0 diff_hstl_ii_18=0 ppds_25=0
diff_sstl18_i=0 diff_sstl18_ii=0 diff_sstl135=0 diff_sstl135_r=0
blvds_25=0

router
usage
lut=748 ff=378 bram36=16 bram18=0
ctrls=27 dsp=0 iob=21 bufg=0
global_clocks=1 pll=0 bufr=0 nets=1831
movable_instances=1644 pins=12571 bogomips=0 high_fanout_nets=2
effort=2 threads=2 router_timing_driven=1 timing_constraints_exist=1
estimated_expansions=1628940 actual_expansions=1914202 router_runtime=40.580000

synthesis
command_line_options
-part=xc7z020clg400-2 -name=default::[not_specified] -top=design_1_wrapper -include_dirs=default::[not_specified]
-generic=default::[not_specified] -verilog_define=default::[not_specified] -constrset=default::[not_specified] -seu_protect=default::none
-flatten_hierarchy=default::rebuilt -gated_clock_conversion=default::off -directive=default::default -rtl=default::[not_specified]
-link_dcps=default::[not_specified] -rtl_load_constraints=default::[not_specified] -bufg=default::12 -fanout_limit=default::10000
-shreg_min_size=default::3 -mode=default::default -fsm_extraction=default::auto -keep_equivalent_registers=default::[not_specified]
-resource_sharing=default::auto -cascade_dsp=default::auto -control_set_opt_threshold=default::auto
usage
elapsed=00:01:28s memory_peak=695.816MB memory_gain=481.883MB hls_ip=0