Arithmetic Logic Unit [ALU]

For this assignment we’ll be implementing an arithmetic logic unit or ALU. ALU’s are the heart and soul of a processor, they allow processors to do what they do best, process data! Below is the list of operations that must be supported by this ALU.

Below is a list of recommended steps to complete this assignment:

1. Complete the “Signed_to_SLV.vhd” design, this will be used to allow you to take in signed numbers and output the std_logic_vector equivalent. This will allow you to take both inputs to booth’s signed multiplication algorithm and represent them using the binary to BCD design from the first lab.
2. Complete the ALU design, this is what actually performs the logic operations.

Setup

If the development board your using has a 4-digit 7 segment display such as the BASYS 2 or BASYS 3 development board you use the on board display for both registers A and B. If you go this route you will need to implement a scheme so that the input being display is based on the input of a slide switch. Otherwise you will need to connect all 16 digits of the 7 segment displays together in a multiplexed fashion. See the schematic below:

See the BOM below for the components I used during the demonstration of this lab.

Verification

In order to verify your design is working properly, go through each of the opcode instructions and verify that all of the results are correct. Feel free to add more functions to the ALU to make a more functional ALU.