Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 
 
Software Version and Target Device
Product Version: ISE:12.4 (WebPack) - M.81d Target Family: Spartan3E
OS Platform: NT64 Target Device: xc3s100e
Project ID (random number) a58fbea0c9e9413b814544de1c078e64.A26A6E3FBFC0450181EB6036A12EBF35.2 Target Package: cp132
Registration ID 0_0_616 Target Speed: -4
Date Generated 2017-04-21T18:25:21 Tool Flow ISE
 
User Environment
OS Name Microsoft OS Release Service Pack 1 (build 7601)
CPU Name Intel(R) Core(TM) i7-2630QM CPU @ 2.00GHz CPU Speed 1995 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Adders/Subtractors=5
  • 4-bit adder=4
  • 5-bit adder=1
 Comparators=9
  • 24-bit comparator greatequal=1
  • 24-bit comparator less=2
  • 5-bit comparator greater=4
  • 9-bit comparator greatequal=1
  • 9-bit comparator less=1
 Counters=4
  • 24-bit up counter=2
  • 27-bit up counter=1
  • 9-bit up counter=1
 FSMs=1 ROMs=4
  • 16x7-bit ROM=4
 Registers=74
  • Flip-Flops=74
 		MiscellaneousStatistics
  • AGG_BONDED_IO=15
  • AGG_IO=15
  • AGG_SLICE=168
  • NUM_4_INPUT_LUT=295
  • NUM_BONDED_IBUF=3
  • NUM_BONDED_IOB=12
  • NUM_BUFGMUX=1
  • NUM_CYMUX=107
  • NUM_LUT_RT=87
  • NUM_RPM=16
  • NUM_SLICEL=168
  • NUM_SLICE_FF=160
  • NUM_XOR=84
 		NetStatistics
  • NumNets_Active=351
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=107
  • NumNodesOfType_Active_CNTRLPIN=145
  • NumNodesOfType_Active_DOUBLE=384
  • NumNodesOfType_Active_DUMMY=791
  • NumNodesOfType_Active_DUMMYESC=3
  • NumNodesOfType_Active_GLOBAL=35
  • NumNodesOfType_Active_HFULLHEX=5
  • NumNodesOfType_Active_HLONG=3
  • NumNodesOfType_Active_HUNIHEX=8
  • NumNodesOfType_Active_INPUT=883
  • NumNodesOfType_Active_IOBOUTPUT=3
  • NumNodesOfType_Active_OMUX=362
  • NumNodesOfType_Active_OUTPUT=335
  • NumNodesOfType_Active_PREBXBY=183
  • NumNodesOfType_Active_VFULLHEX=23
  • NumNodesOfType_Active_VLONG=10
  • NumNodesOfType_Active_VUNIHEX=19
  • NumNodesOfType_Vcc_CNTRLPIN=1
  • NumNodesOfType_Vcc_INPUT=4
  • NumNodesOfType_Vcc_PREBXBY=3
  • NumNodesOfType_Vcc_VCCOUT=5
 SiteStatistics
  • IBUF-DIFFM=1
  • IBUF-DIFFMI=1
  • IOB-DIFFM=6
  • IOB-DIFFS=5
  • SLICEL-SLICEM=70
 		SiteSummary
  • BUFGMUX=1
  • BUFGMUX_GCLKMUX=1
  • BUFGMUX_GCLK_BUFFER=1
  • IBUF=3
  • IBUF_INBUF=3
  • IBUF_PAD=3
  • IOB=12
  • IOB_OUTBUF=12
  • IOB_PAD=12
  • SLICEL=168
  • SLICEL_C1VDD=7
  • SLICEL_C2VDD=6
  • SLICEL_CYMUXF=55
  • SLICEL_CYMUXG=52
  • SLICEL_F=144
  • SLICEL_F5MUX=10
  • SLICEL_FFX=91
  • SLICEL_FFY=69
  • SLICEL_G=151
  • SLICEL_GNDF=48
  • SLICEL_GNDG=46
  • SLICEL_XORF=43
  • SLICEL_XORG=41
 
Configuration Data
BUFGMUX
  • S=[S_INV:1] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:1]
  • S=[S_INV:1] [S:0]
 IBUF_PAD
  • IOATTRBOX=[LVCMOS25:3]
 IOB
  • O1=[O1_INV:0] [O1:12]
 IOB_OUTBUF
  • IN=[IN_INV:0] [IN:12]
 IOB_PAD
  • DRIVEATTRBOX=[12:12]
  • IOATTRBOX=[LVCMOS25:12]
  • SLEW=[SLOW:12]
 SLICEL
  • BX=[BX_INV:0] [BX:27]
  • BY=[BY:10] [BY_INV:1]
  • CE=[CE:27] [CE_INV:13]
  • CIN=[CIN_INV:0] [CIN:50]
  • CLK=[CLK:62] [CLK_INV:45]
  • SR=[SR:105] [SR_INV:0]
 SLICEL_CYMUXF
  • 0=[0:55] [0_INV:0]
  • 1=[1_INV:0] [1:55]
 SLICEL_CYMUXG
  • 0=[0:52] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:10] [S0_INV:0]
 SLICEL_FFX
  • CE=[CE:27] [CE_INV:12]
  • CK=[CK:49] [CK_INV:42]
  • D=[D:91] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:90] [INIT1:1]
  • FFX_SR_ATTR=[SRLOW:91]
  • LATCH_OR_FF=[FF:91]
  • SR=[SR:89] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:48] [SYNC:43]
 SLICEL_FFY
  • CE=[CE:26] [CE_INV:13]
  • CK=[CK:56] [CK_INV:13]
  • D=[D:68] [D_INV:1]
  • FFY_INIT_ATTR=[INIT0:67] [INIT1:2]
  • FFY_SR_ATTR=[SRLOW:69]
  • LATCH_OR_FF=[FF:69]
  • SR=[SR:67] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:27] [SYNC:42]
 SLICEL_XORF
  • 1=[1_INV:0] [1:43]
 
Pin Data
BUFGMUX
  • I0=1
  • O=1
  • S=1
 BUFGMUX_GCLKMUX
  • I0=1
  • OUT=1
  • S=1
 BUFGMUX_GCLK_BUFFER
  • IN=1
  • OUT=1
 IBUF
  • I=3
  • PAD=3
 IBUF_INBUF
  • IN=3
  • OUT=3
 IBUF_PAD
  • PAD=3
 IOB
  • O1=12
  • PAD=12
 IOB_OUTBUF
  • IN=12
  • OUT=12
 IOB_PAD
  • PAD=12
 SLICEL
  • BX=27
  • BY=11
  • CE=40
  • CIN=50
  • CLK=107
  • COUT=52
  • F1=144
  • F2=96
  • F3=89
  • F4=58
  • G1=149
  • G2=100
  • G3=89
  • G4=65
  • SR=105
  • X=49
  • XB=1
  • XQ=91
  • Y=70
  • YQ=69
 SLICEL_C1VDD
  • 1=7
 SLICEL_C2VDD
  • 1=6
 SLICEL_CYMUXF
  • 0=55
  • 1=55
  • OUT=55
  • S0=55
 SLICEL_CYMUXG
  • 0=52
  • 1=52
  • OUT=52
  • S0=52
 SLICEL_F
  • A1=144
  • A2=96
  • A3=89
  • A4=58
  • D=144
 SLICEL_F5MUX
  • F=10
  • G=10
  • OUT=10
  • S0=10
 SLICEL_FFX
  • CE=39
  • CK=91
  • D=91
  • Q=91
  • SR=89
 SLICEL_FFY
  • CE=39
  • CK=69
  • D=69
  • Q=69
  • SR=67
 SLICEL_G
  • A1=149
  • A2=100
  • A3=89
  • A4=65
  • D=151
 SLICEL_GNDF
  • 0=48
 SLICEL_GNDG
  • 0=46
 SLICEL_XORF
  • 0=43
  • 1=43
  • O=43
 SLICEL_XORG
  • 0=41
  • 1=41
  • O=41
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s100e-cp132-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -nt timestamp -uc <fname>.ucf -p xc3s100e-cp132-4 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc3s100e-cp132-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 4 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
XSLTProcess 41 41 0 0 0 0 0
_impact 4 4 0 0 0 0 0
bitgen 50 50 0 0 0 0 0
cpldfit 41 41 0 0 0 0 0
edif2ngd 1 1 0 0 0 0 0
hprep6 41 41 0 0 0 0 0
ibiswriter 1 1 0 0 0 0 0
map 48 48 0 0 0 0 0
ngc2edif 6 6 0 0 0 0 0
ngcbuild 1 1 0 0 0 0 0
ngdbuild 105 105 0 0 0 0 0
par 48 47 1 0 0 0 0
taengine 17 17 0 0 0 0 0
trce 47 47 0 0 0 0 0
tsim 41 41 0 0 0 0 0
xbash 1 1 0 0 0 0 0
xst 132 131 0 0 0 0 0
 
Help Statistics
Search words with results
adding bus ( 1 ) adding a bus ( 1 )
bus ( 1 ) bus tap ( 1 )
bus taps ( 1 ) counter ( 1 )
using bus taps ( 1 )
Help files
/doc/usenglish/isehelp/cpld_all/libs_le_buf.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_bufgsr.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_cb4ce.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_cb4cle.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_cb8re.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_cd4ce.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_cj4ce.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_cj8re.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_comp16.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_comp8.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_compm2.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_d2_4e.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_d4_16e.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_fd.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_fjkp.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_inv.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_ld.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_ld16.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_ld4.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_ldc.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_ldcp.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_ldp.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_m2_1e.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_m4_1e.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_nand2.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_nand7.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_nor2.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_sr4rled.htm ( 1 )
/doc/usenglish/isehelp/cpld_all/libs_le_xnor2.htm ( 1 ) /doc/usenglish/isehelp/cpld_all/libs_le_xnor7.htm ( 1 )
/doc/usenglish/isehelp/pim_r_supported_spi_bpi_proms.htm ( 1 ) /doc/usenglish/isehelp/pn_db_npw_device_properties.htm ( 1 )
/doc/usenglish/isehelp/pn_db_nsw_select_source_type.htm ( 1 ) /doc/usenglish/isehelp/spartan3e/libs_le_cb16ce.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_cb16cled.htm ( 1 ) /doc/usenglish/isehelp/spartan3e/libs_le_cb2cled.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_cb4ce.htm ( 1 ) /doc/usenglish/isehelp/spartan3e/libs_le_cb4cle.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_cc16ce.htm ( 1 ) /doc/usenglish/isehelp/spartan3e/libs_le_pullup.htm ( 1 )
/doc/usenglish/isehelp/spartan3e/libs_le_sr4ce.htm ( 1 ) /doc/usenglish/isehelp/spartan3e/libs_le_sr4cled.htm ( 1 )
/doc/usenglish/isehelp/sse_c_bus_names.htm ( 1 ) /doc/usenglish/isehelp/sse_c_name_nets_to_bus.htm ( 1 )
/doc/usenglish/isehelp/sse_c_nets.htm ( 1 ) /doc/usenglish/isehelp/sse_c_overview.htm ( 1 )
/doc/usenglish/isehelp/sse_db_net_attr_visibility.htm ( 1 ) /doc/usenglish/isehelp/sse_db_obsolete_symbols.htm ( 1 )
/doc/usenglish/isehelp/sse_n_adding_bus_tap.htm ( 1 ) /doc/usenglish/isehelp/sse_p_adding_bus_tap_autonaming.htm ( 1 )
/doc/usenglish/isehelp/sse_p_adding_bus_tap_manually.htm ( 1 ) /doc/usenglish/isehelp/sse_p_adding_net.htm ( 1 )
/doc/usenglish/isehelp/sse_p_connecting_net_bus.htm ( 1 ) /doc/usenglish/isehelp/sse_p_creating_bus.htm ( 1 )
/doc/usenglish/isehelp/sse_p_naming_bus.htm ( 1 ) /doc/usenglish/isehelp/sse_p_naming_net.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_ProjectDescription=Binary Coded Decimal Display Counter that can toggle between BCD and hexadecimal display.
PROP_PropSpecInProjFile=Store all values PROP_Simulator=ISim (VHDL/Verilog)
PROP_SynthTopFile=changed PROP_Top_Level_Module_Type=Schematic
PROP_UseSmartGuide=false PROP_UserConstraintEditorPreference=Text Editor
PROP_intProjectCreationTimestamp=2017-04-20T08:30:24 PROP_intWbtProjectID=A26A6E3FBFC0450181EB6036A12EBF35
PROP_intWbtProjectIteration=2 PROP_intWorkingDirLocWRTProjDir=Same
PROP_intWorkingDirUsed=No PROP_AutoTop=false
PROP_DevFamily=Spartan3E PROP_DevDevice=xc3s100e
PROP_DevFamilyPMName=spartan3e PROP_DevPackage=cp132
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_DevSpeed=-4
PROP_PreferredLanguage=VHDL FILE_SCHEMATIC=1
FILE_UCF=1 FILE_VHDL=5
 
Unisim Statistics
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_AND2=5 NGDBUILD_NUM_AND3=4 NGDBUILD_NUM_AND4=4 NGDBUILD_NUM_AND5=3
NGDBUILD_NUM_BUFGP=1 NGDBUILD_NUM_FDCE=16 NGDBUILD_NUM_FDCE_1=16 NGDBUILD_NUM_FDC_1=39
NGDBUILD_NUM_FDE=4 NGDBUILD_NUM_FDR=27 NGDBUILD_NUM_FDRE=58 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_INV=12 NGDBUILD_NUM_LUT1=87 NGDBUILD_NUM_LUT2=8
NGDBUILD_NUM_LUT2_D=1 NGDBUILD_NUM_LUT2_L=2 NGDBUILD_NUM_LUT3=50 NGDBUILD_NUM_LUT3_D=1
NGDBUILD_NUM_LUT4=83 NGDBUILD_NUM_LUT4_D=2 NGDBUILD_NUM_LUT4_L=28 NGDBUILD_NUM_MUXCY=107
NGDBUILD_NUM_MUXF5=8 NGDBUILD_NUM_OBUF=12 NGDBUILD_NUM_PULLUP=1 NGDBUILD_NUM_VCC=2
NGDBUILD_NUM_XOR2=16 NGDBUILD_NUM_XORCY=84
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_AND2=5 NGDBUILD_NUM_AND3=4 NGDBUILD_NUM_AND4=4 NGDBUILD_NUM_AND5=3
NGDBUILD_NUM_BUFG=1 NGDBUILD_NUM_FDCE=16 NGDBUILD_NUM_FDCE_1=16 NGDBUILD_NUM_FDC_1=39
NGDBUILD_NUM_FDE=4 NGDBUILD_NUM_FDR=27 NGDBUILD_NUM_FDRE=58 NGDBUILD_NUM_GND=1
NGDBUILD_NUM_IBUF=2 NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=12 NGDBUILD_NUM_LUT1=87
NGDBUILD_NUM_LUT2=8 NGDBUILD_NUM_LUT2_D=1 NGDBUILD_NUM_LUT2_L=2 NGDBUILD_NUM_LUT3=50
NGDBUILD_NUM_LUT3_D=1 NGDBUILD_NUM_LUT4=83 NGDBUILD_NUM_LUT4_D=2 NGDBUILD_NUM_LUT4_L=28
NGDBUILD_NUM_MUXCY=107 NGDBUILD_NUM_MUXF5=8 NGDBUILD_NUM_OBUF=12 NGDBUILD_NUM_PULLUP=1
NGDBUILD_NUM_VCC=2 NGDBUILD_NUM_XOR2=16 NGDBUILD_NUM_XORCY=84