WEBVTT

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Now, we already looked into how we use a lead me to hide due to a condition that is how we use the

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finals.

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We'll give you also understood how we can use the multiple coalition in a statement.

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To sum up, the good practice that you need to follow is, for example, whenever you are utilizing

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a final statement, see that all the coalition, the behavior for all the conditions are specified.

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So when we consider the finals, so we have this condition, right?

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So when this condition is true, we need to specify the behavior and basically representing what should

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be the system behavior when this condition is not true, right?

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So this basically represent a complete behavior where we have a condition and we have specified what

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should be done when that condition evaluates to true.

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We also have specified what should be done when the condition is not evaluated to the right.

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So this represents the complete behavior.

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Now let's assume if we remove the cells from this, if construct right, so we remove else now this

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is what we refer to as an incomplete behavior where we are defining what should be done when the condition

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evaluates to true.

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But we have not specified what should be done, then this condition do not.

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All right.

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So this basically leads to the creation of a latch, right?

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So Latch are not natively supported by an FPGA.

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OK, so that basically restrict our maximum frequency usage and also design the extra circuitry into

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our entire design, right?

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So it is highly recommended that you correctly specify the complete behavior for your condition, right?

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And it will lead to creation of an extra circuitry.

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And you may get an unexpected behavior from an implemented rate to with this.

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OK, so we already know that when we completely specify the behavior, we are able to invoke always

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to one select already display and try to first analyze the behavior we get, then we correctly specify

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all the conditions, right?

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So here we specified when selected 0Y should be connected to it and else y should be, this should be

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right.

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Okay, so here we correctly define all the condition, right?

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So let me just reload our schematic and analyze the component that is being worked out for this, right?

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So if you analyze a schematic, you able to invoke article marks.

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OK, two of the inputs are organically connected to an input performance.

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And we also have a control input connected to a great time.

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The output is also connected to an all fly great.

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So this represents the correct component, right, that we want when you walk out of this call.

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Now, if you just dream, who else like wants to be right?

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So this basically represent an incomplete behavior.

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OK, here we do not mention the system behavior when conditions do not evaluate the true right.

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And this basically will lead to creation of a large and an extra circuitry OK, resulting into an unpredictable

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behavior.

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So if you just analyze the schematic after this modification, you could clearly see we have an ideal

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max rate.

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But Dr. Max is connected to something else, right?

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So it is connected to we see over here and here it is connected to a ground.

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And then if you analyze this.

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OK, so we have one latch which is in there.

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It is connected to this deal, but this is not something that we are expecting, right?

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So we are expecting a month, but we want to get something which we never expect to make.

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So remember, whenever you are utilizing offensively, you must declare the behavior of the system and

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condition, evaluate to true and the behavior when conditions do not evaluate you, right?
