WEBVTT 00:00.150 --> 00:05.460 Let us start discussion on behavioral modeling study rates to the most fundamental block that we have 00:05.460 --> 00:10.620 in and behavioral modeling state is referred to as a process, right? 00:10.860 --> 00:15.230 So process defines this sensitivity list of our system, right? 00:15.240 --> 00:21.840 So whenever you have a behavioral modeling state, you need to first identify on which all input ports 00:21.870 --> 00:23.670 your system is sensitive, right? 00:23.680 --> 00:29.930 So when we see those systems, then to do that basically mean the expression that you have for an output, 00:30.210 --> 00:30.570 right? 00:30.810 --> 00:34.800 So it will be consisting of a set of an input, right? 00:34.800 --> 00:42.180 So the input that you specify in a process block will get as soon as any one of them changes. 00:42.780 --> 00:47.640 So the expression will be reevaluated and you see an ability and an output value rate. 00:47.640 --> 00:56.580 So when we consider the process, so we usually have three scenarios Rachel, first one that is we are 00:56.580 --> 01:04.170 implementing a combination of so-called right or we are implementing a sequential circuit. 01:06.590 --> 01:06.950 OK. 01:07.460 --> 01:15.050 And here we have our reset Typekit synchronous, right, so this is the second situation that we could 01:15.050 --> 01:15.350 have. 01:15.620 --> 01:17.180 The third situation could be. 01:17.210 --> 01:20.480 You have a sequential circuit, right? 01:20.840 --> 01:24.080 But the type of reset is all synchronous. 01:27.370 --> 01:32.550 So these are these are the only three situation that you'll be finding when you work with the reveal 01:32.550 --> 01:35.250 systems data in a combination of this, OK? 01:35.310 --> 01:35.540 Right. 01:35.550 --> 01:40.650 So whenever we see a combination of processes or a combination of system or combination of circuit. 01:40.980 --> 01:42.660 So here are output. 01:43.020 --> 01:45.120 OK, so our output depends. 01:47.340 --> 01:51.330 On all land, all the inputs, right? 01:52.170 --> 01:59.520 So whenever we use to process in combination of circuit, we need to make sure that we had all the inputs 01:59.520 --> 02:00.900 into a process block, right? 02:00.900 --> 02:06.090 So that basically mean we are implementing a combination is circuit great energy, a case of a sequence. 02:06.090 --> 02:09.990 You're so good with the synchronous reset, our system will be evaluated. 02:10.320 --> 02:10.710 OK. 02:11.370 --> 02:12.840 On the edge of a clock. 02:12.840 --> 02:15.810 So we just need to mention the clock in a process block. 02:16.680 --> 02:18.500 OK, and we switch to reset it. 02:18.510 --> 02:19.380 Also synchronous. 02:19.710 --> 02:22.590 So Reset will be stands on the edge of your clock, right? 02:22.600 --> 02:30.810 So when we consider this one slow process will be consisting of just the clock signal. 02:30.930 --> 02:31.200 Right? 02:31.440 --> 02:35.580 So this is how we recognize the sequence show circuit in a synchronous reset. 02:36.090 --> 02:41.880 Whereas then we have a situation where we are implementing a sequential circuit that we that have another 02:41.880 --> 02:42.870 synchronous reset. 02:42.870 --> 02:46.890 In that case, we just need to use the process block, right? 02:47.100 --> 02:53.100 And inside the process, we need to output the signals that is clock as well as reset rate. 02:53.520 --> 02:55.050 So remember, there's differences. 02:55.080 --> 03:02.070 So whenever we have a combination of circuit, so process will consist of all inputs. 03:03.000 --> 03:03.360 OK. 03:04.380 --> 03:06.480 When we consider the sequential circuit. 03:06.690 --> 03:12.150 OK, with the synchronous reset, in this case, our output will be evaluated on the edge of a clock. 03:12.390 --> 03:14.990 So we just need to mention the clock in the process, right? 03:15.750 --> 03:20.510 And when we want to have another synchronous resetting the sequential circuit, we just need to mention 03:20.520 --> 03:22.170 clock and reset right now. 03:22.380 --> 03:24.820 For example, lattices you right? 03:25.200 --> 03:32.720 We have put OK, we are implementing a sequential circuit break to E B and select. 03:32.730 --> 03:36.720 So let's assume that we are implementing to and max rate. 03:36.720 --> 03:40.920 So we have the required three input e b select each of a single bit. 03:41.190 --> 03:44.920 So we have n standard underscore logic, right? 03:44.940 --> 03:51.420 Then we have a not a Y, which is about standard, undisclosed logic, right? 03:51.420 --> 03:55.620 So this complete all the code that we required for our two is two one max. 03:55.920 --> 04:02.850 So when we use the process clock right, we're here, so we need to include all the input. 04:03.130 --> 04:08.640 OK, in the process clock, because this is the combination of, OK, great. 04:08.640 --> 04:13.560 So for us, the system consists of E B and select as an input put right. 04:13.560 --> 04:17.400 So we just need to b comma select right. 04:17.410 --> 04:22.790 So this is how we add or specify all the inputs in a process, right? 04:22.980 --> 04:25.230 Let's assume we are implementing a deeply flawed. 04:25.560 --> 04:27.960 So we have a detailed would be right. 04:27.960 --> 04:30.000 So that is offsides single bit. 04:30.780 --> 04:31.140 OK. 04:31.470 --> 04:38.820 Then we have a synchronizing signal, which is clock right that is having a dive again detection as 04:38.820 --> 04:40.800 input and type is in standard. 04:40.800 --> 04:41.840 And the second logic, right? 04:41.850 --> 04:45.670 So let's assume that every plot would not consist of any reset rate. 04:46.140 --> 04:53.190 We just have an output port which is still out right and this will have a direction as out and type 04:53.190 --> 04:55.400 will be standard, underscore logic, right? 04:55.420 --> 05:00.000 So if we are implementing this system now, this is a sequential circuit. 05:00.060 --> 05:06.390 OK, well, we do not have any research, so we just need to add a clock in this sensitivity list, 05:06.390 --> 05:06.690 right? 05:07.080 --> 05:08.160 This is how we implement. 05:08.400 --> 05:15.240 The sequential circuit identifier system consists of three sets of depending on the type of reset that 05:15.240 --> 05:18.930 you are planning to implement if you are implementing a synchronous reset. 05:19.230 --> 05:26.030 Again, the process will remain c that is, you just need to use process and specify the clock inside 05:26.040 --> 05:26.170 it. 05:26.190 --> 05:27.060 But if you are. 05:27.090 --> 05:34.380 So this basically will implement a synchronous reset if you are targeting another synchronous research. 05:34.380 --> 05:41.850 So you just need to mention like this slow process clock and then you add a reset also in the process. 05:42.020 --> 05:42.330 All right. 05:42.330 --> 05:47.850 So this will lead to creation of an Ussing chronos reset. 05:47.970 --> 05:48.270 Right? 05:48.600 --> 05:53.400 So these are some of the fundamentals that you require to know when we start the behavioral modeling 05:53.400 --> 05:54.810 stage right now, what are we going to do? 05:54.810 --> 06:01.110 Is we will be understanding the skeleton of the behavioral modeling state before we actually proceed 06:01.110 --> 06:04.840 to consider implementation of example in a behavioral modeling.