WEBVTT 00:00.090 --> 00:05.010 This will automatically add a small school, which is named as an operator in the design, so we'll 00:05.010 --> 00:08.580 just be exploring the container off and hopping right? 00:09.600 --> 00:15.180 Now, if you explore the first part, right, so our usual pool is divided into three parts. 00:15.390 --> 00:16.970 We have a library now. 00:17.100 --> 00:22.470 We will be working with the standard and this good logic and this is defined in that standard and the 00:22.470 --> 00:24.360 school logic are just for one one six four. 00:24.750 --> 00:24.950 Right. 00:24.960 --> 00:27.630 So this two state means are mandatory rated. 00:27.630 --> 00:33.660 This will include all the necessary files which are required for us to work with the standard logic 00:34.050 --> 00:37.440 states then, since they have a size of single batch. 00:37.440 --> 00:40.200 So it will be standard on discovery logic, right? 00:40.200 --> 00:41.970 And the direction will be erroneous. 00:42.000 --> 00:48.360 NC, which which represented our output direction, will be output and size will again be single right 00:48.780 --> 00:48.990 now. 00:48.990 --> 00:56.340 In a case of the data flow modeling say we have a set of incognita which are now utilized and the way 00:56.340 --> 01:04.730 you assign the values to an output signal signals by using the signal assignment right? 01:05.010 --> 01:10.470 In this case, you could clearly see that if you observe the net right. 01:10.620 --> 01:12.900 So these are great. 01:14.530 --> 01:16.900 Gives us some information, right? 01:17.080 --> 01:25.390 And did that indeed give us carry Grace, who will be proceeding to declare some might, so some is 01:25.390 --> 01:27.990 represented with s in our court, right? 01:28.030 --> 01:32.490 Then we use a signal assignment operator and then we act e OK. 01:32.650 --> 01:36.490 The logic gate that we require is an X. 01:36.490 --> 01:38.820 All right, so we'll just turn right. 01:38.840 --> 01:43.580 This is how the boy so argued is represented in the right. 01:43.850 --> 01:49.840 They inquire Kerry E and B right now. 01:49.840 --> 01:55.020 Remember this case insensitive do so we could just use and in a lowercase. 01:55.030 --> 01:56.980 All right, it doesn't affect the state. 01:56.980 --> 01:58.150 So this completes the quote. 01:58.420 --> 02:04.600 Now, when you add a multiple stupid in the morning, say to the RFQ as on good and see me that basically 02:04.600 --> 02:06.280 mean for each book. 02:06.370 --> 02:12.570 We have an independent hardware implementation and to verify that we just see that right. 02:12.940 --> 02:17.280 Go back to a wider and then in an ideal analysis, do you have a schematic? 02:17.320 --> 02:17.550 Right? 02:17.560 --> 02:21.380 So we go ahead and click on the schematic. 02:21.400 --> 02:27.100 So if you observe the schematic, so we have an independent hardware for a caddy, which is A9G, right? 02:27.190 --> 02:31.720 And we also have an independent hardware for some, right, which is an example. 02:31.870 --> 02:37.600 So this basically means both the patient will be evaluated in that balance, right? 02:38.730 --> 02:40.900 Now purified the functionality of an outfit. 02:41.370 --> 02:47.180 We go to this simulation, OK, and we'll just be clicking on run simulation, right? 02:47.190 --> 02:53.460 So here we haven't added the test bench rates of test benches, the cool which Genndy, though random 02:53.460 --> 02:55.800 stimulus for us and apply to our duty. 02:55.980 --> 02:58.400 And we could just analyze the response so far. 02:59.010 --> 02:59.140 Right. 02:59.370 --> 03:06.150 But we haven't decided the test bench fully yet, so we need to manually apply the stimulus to the input. 03:06.390 --> 03:09.420 And then we need to observe the response at an output rate. 03:09.600 --> 03:13.770 So as you pull this further, we'll be discussing how we add a test, right? 03:14.100 --> 03:19.260 So we go ahead and click on run simulation and we'll be selecting run behavioral simulation. 03:19.320 --> 03:25.260 So once your simulation window opens up, you'll be finding you have a list of all the pools which are 03:25.260 --> 03:26.460 present in your design. 03:26.620 --> 03:33.070 So we have to input and be and some N.K. basal while the input and output ports are present in our design. 03:33.120 --> 03:38.580 Now we go ahead and apply the random stimulus for any rate, and the easiest method to apply a stimulus 03:38.580 --> 03:40.800 is by utilizing force clock rate. 03:40.800 --> 03:44.960 So we select input directly and then which will slow, right? 03:45.720 --> 03:48.960 The only thing that we want to do is to vary the pin. 03:48.960 --> 03:52.670 Looking for an independent input will be choosing a different period, right? 03:52.920 --> 03:59.400 So here the parade is 100 nanoseconds, so we'll keep as it is when we select the right click first 03:59.400 --> 03:59.700 clock. 03:59.910 --> 04:05.040 OK, here what we want to do is the period that will be choosing is 300 nanoseconds, right? 04:05.040 --> 04:09.360 So this will be our strategy when we have multiple inputs, OK? 04:09.540 --> 04:14.640 And if you want to generate an independent signal, right, so click OK and then we'll be executing 04:14.640 --> 04:16.680 our code four thousand nanosecond. 04:16.870 --> 04:19.770 So here you have an option to execute it, right? 04:19.770 --> 04:26.410 So once you execute, you just click on Zoom, OK, and then you'll be observing the response so far. 04:26.880 --> 04:27.180 Right? 04:27.540 --> 04:34.860 So when EMV, both the inputs are high, so carry should be one and some should be zero, then one off 04:34.860 --> 04:36.270 an input is high. 04:36.270 --> 04:39.060 In that case, some should be high and Katie should be right. 04:39.060 --> 04:40.870 So you could observe we have zero. 04:41.550 --> 04:46.320 Some is that at zero and then we have one zero over here, right? 04:46.590 --> 04:51.200 Still, some is high and carries it right down when booting zero, that is. 04:51.460 --> 04:54.530 And people are zero, something that he should also be. 04:55.790 --> 04:59.840 They do this decrees that are half-an-hour is working correctly. 04:59.980 --> 05:04.130 Right, so this is how we utilize the signals. 05:04.130 --> 05:07.500 I'm an operator who write the code in need have a little more state. 05:07.730 --> 05:13.540 Now the key point to remember here is if you observe the nets, which are present in our design, right? 05:13.550 --> 05:18.560 So we have this as one off on it, which is present in our design. 05:18.830 --> 05:21.140 This is a design that we have in our design. 05:21.150 --> 05:24.800 Similarly, this one is the net that we have in our design. 05:24.830 --> 05:27.260 This one, this one and this one. 05:27.560 --> 05:35.090 So if you observe this net is defined with the near miss, this net is defined, which means see this 05:35.090 --> 05:36.530 net is defined. 05:36.770 --> 05:40.730 OK, with me, this net is also defined, right? 05:40.910 --> 05:42.620 So this net is also defined. 05:42.860 --> 05:45.260 And in fact, this two nets are all this would be finite. 05:45.260 --> 05:52.850 So you could see that all the nets which are present in our design are defined in an entity, right? 05:52.850 --> 05:56.700 Because in an entity we define S, C and B, right. 05:56.810 --> 06:03.470 So here, since all the nets are defined, we do not require to use any signal in our WHO. 06:03.530 --> 06:03.820 Great. 06:03.860 --> 06:10.700 Now we'll consider the next example where we have presence of some undefined net in and design so that 06:10.700 --> 06:14.510 we also understand how we use the signal and then be more.