WEBVTT 00:00.150 --> 00:07.600 So there are three methods by which we can in memory a specific kind of a memory with a visual, so 00:07.680 --> 00:13.710 we'll go through each and every Metroliner detail so that you can clearly choose which method utilized 00:13.710 --> 00:16.470 to make certain requirements. 00:16.500 --> 00:21.720 OK, so what we first with will declare some of the folk which are required for a single program. 00:21.750 --> 00:27.390 So first we'll proceed with the single program and then probably will understand dual Putera and then 00:27.390 --> 00:29.750 we can have a good comparison between them. 00:29.930 --> 00:32.460 OK, so we have a clock and read. 00:32.460 --> 00:33.480 Right, OK. 00:33.660 --> 00:39.090 Which are a single bit and say so in standard underscore logic. 00:39.120 --> 00:43.170 OK, so this is the first two words that are present inside. 00:43.170 --> 00:45.300 Our design will assume that. 00:45.810 --> 00:50.670 OK, so we required to address sixty four elements. 00:50.700 --> 00:58.930 OK, so when we have a requirement of sixty four elements in that case I just say should be six bitrate. 00:58.960 --> 01:02.130 So we'll just be declaring it to be five down to zero. 01:03.220 --> 01:09.060 Then let's assume that data says that we are targeting, is it right? 01:09.090 --> 01:15.120 So in standard cold logic and then vector seven down to to right. 01:15.460 --> 01:19.200 Similarly, we required a deal where we'll be looking at it back. 01:19.290 --> 01:27.340 So our standard and this core logic and the school vector and then seven down to see. 01:27.640 --> 01:31.000 So this completes all the food that we wish to have. 01:32.220 --> 01:37.290 Inside at like 2:00 is a synchronising signal for our entire lives. 01:37.980 --> 01:39.640 Then we have a U-turn right then. 01:39.690 --> 01:46.830 So when right is high, we will be writing a letter to ready and when writers will be reading the letter 01:46.860 --> 01:51.620 back from our member state, we have an address which is having a of six figures. 01:51.630 --> 01:54.630 So the maximum element that again, addresses. 01:56.210 --> 02:04.610 Sixty four, right to so to six is 64 and then we have a lot of Sisay, so the first method is when 02:04.610 --> 02:11.120 we are not considered or we are not interested in invoking a specific memory. 02:11.120 --> 02:17.050 So we have some general idea and we are least interested in which specific resources to utilize. 02:17.070 --> 02:23.150 So we have to kind of resources for implementing a memory in if we can either use. 02:24.770 --> 02:28.160 Distributor memory, or we can also use a block memory. 02:28.700 --> 02:33.230 So let us assume that we are least interested to invoke a specific. 02:34.950 --> 02:39.180 Resource in that case, we follow the general structure of our time and then we. 02:40.300 --> 02:45.590 I love Revital to choose what will be the best type of memory for our design, right? 02:46.240 --> 02:50.620 So we'll start first will declare Dennery, which will act as a memory for us. 02:50.650 --> 02:52.670 OK, so we start with the type. 02:53.890 --> 02:58.530 OK, let it just name this as meme type, and it is Inari, OK? 02:58.810 --> 03:04.300 And let us assume that there are six to four elements are addressed, plus can address aggressively 03:04.480 --> 03:07.930 sixty four elements, so it will be zero to 63. 03:08.170 --> 03:12.370 So if you can compare two with down you'll be finding down. 03:12.380 --> 03:14.140 Do we have an highest number. 03:15.830 --> 03:16.860 On the left of. 03:18.160 --> 03:18.760 Down to. 03:20.290 --> 03:25.090 And then we have a lowest number, but to operate in exactly opposite. 03:25.270 --> 03:32.560 So on the left side, you have a lowest number or an LSP says you can see and then you have an maximum 03:32.560 --> 03:33.310 try to take you on. 03:33.520 --> 03:35.730 So this is how you specify it. 03:35.750 --> 03:43.210 So you can either use seven down to zero or you can use zero to 60 so that the both represent the number 03:43.210 --> 03:44.320 in the same rate. 03:44.440 --> 03:51.340 So there are sixty four elements and we are targeting the size of a standard and the school logic and 03:51.350 --> 03:53.050 the score vector. 03:56.060 --> 04:04.360 And then we're just adding seven right now, we need to declare that that can work on this, memetics 04:04.370 --> 04:05.710 will proceed with the signal. 04:05.780 --> 04:11.030 We just need this very well and this will be working on this statement. 04:11.250 --> 04:16.730 OK, so this is how you declare the memory type mandate, is that you specified the number of elements 04:16.760 --> 04:22.880 that you were targeting and then the size of each element right now will proceed with writing a code 04:22.880 --> 04:23.490 for our. 04:25.960 --> 04:34.210 So this is a Synchronoss system, so we'll start with the process clock, OK, begin now for us. 04:34.210 --> 04:40.600 Will be sensing an age of a clock, so rising a of a clock right then. 04:41.820 --> 04:49.500 If we have right to be equal to one in that case, we want to write that down to a memory and address 04:49.500 --> 04:50.930 which is specified by a user. 04:51.240 --> 04:58.890 So memory, this is how we have named our variable and then we need to pass on it and there will be 04:58.890 --> 04:59.370 writing. 04:59.970 --> 05:04.300 So that will be updated with the date and addresses. 05:04.770 --> 05:07.170 Here it is, representivity launch. 05:07.170 --> 05:13.440 You can disconnect it, but when we have an Inari, so inside a parenthesis, we need to pass an integer 05:13.440 --> 05:16.340 and we already know how you convert a vector to an integer. 05:16.770 --> 05:18.460 So we'll just try to integer. 05:19.350 --> 05:26.140 OK, this is the first statement that will vary and then unsigned, OK, and we'll just highlight it. 05:26.580 --> 05:31.550 So first, we have converted a logic vector to an unsigned and finally unsigned to an integer. 05:31.560 --> 05:36.480 OK, so this is the difficulty that we get when we walk around with a strongly typed language. 05:37.200 --> 05:40.830 But this also help us to a to. 05:42.510 --> 05:47.040 Specifically track whether we are following the correct data, what we are. 05:48.170 --> 05:48.960 Target date. 05:48.980 --> 05:57.680 So this also avoid an error which are later on very difficult to trace right else, as El's indicate 05:57.680 --> 05:58.970 that we want to read the data. 05:58.970 --> 06:06.590 So Dowd will be updated with whatever data that you have specified and then bringing back that element 06:06.590 --> 06:07.510 from detectorists. 06:07.520 --> 06:08.840 OK, this makes sense. 06:08.840 --> 06:15.680 Now we have our data, too, and if so, we'll decide when and if either and if and then we will just 06:15.680 --> 06:17.310 in the process. 06:17.320 --> 06:17.530 Right. 06:17.810 --> 06:23.900 So this completes of course, what we'll do is we'll just go ahead and see whether we get a green indication 06:23.900 --> 06:25.010 or so we hear. 06:25.010 --> 06:26.390 We have a green indication. 06:26.690 --> 06:32.270 We'll just go back to AVADO and see the element that is invoked for this design. 06:32.510 --> 06:34.550 We just performa synthesis. 06:34.820 --> 06:41.510 So we'll just go ahead Seeb and will perform a synthesis of synthesis will give us an idea what is the 06:41.510 --> 06:48.800 cell for all that from our library, which is being used to implement the memory in this design. 06:48.890 --> 06:57.500 OK, so usually when we have a low depth as well as a low size, so distributer memories have been chosen. 06:57.500 --> 07:05.330 So distributer memory that we use to slice them, which are the logical resources present on an FPGA 07:05.330 --> 07:11.840 architecture to implement a memory so that kind of memories are usually invoked when we have a lower 07:11.840 --> 07:17.840 depth as well as a lower size that we want to store onto a memory. 07:17.870 --> 07:18.060 OK. 07:18.080 --> 07:20.300 So if you just open the synthesized design. 07:22.650 --> 07:24.660 And if you just go to a schematic. 07:25.900 --> 07:33.760 So finding there are certain blocks which have been and so I'll just zoom in a bit to see Guzzo the 07:33.910 --> 07:39.800 Block, which has been invoked on RAM 64 Cross once when this is usually a distributed memory. 07:40.030 --> 07:45.360 In fact, you can just click on this block and then you have that cell property, cell properties. 07:45.370 --> 07:50.680 If you just explode, you'll be finding the type of memory which has been invoked as a distributor. 07:51.170 --> 07:57.640 OK, so you're depending on the code we want to have chosen, which would be the perfect block that 07:57.640 --> 07:58.890 can hang the requirement. 07:59.920 --> 08:05.950 So this is the first case where we are least interested to invoke a specific company, but we allow 08:05.950 --> 08:09.820 people to choose what should be the best memory in specific scenario. 08:10.600 --> 08:15.640 Now, what we'll do is we'll increase that to let it just increase the depth so that we have specified. 08:18.970 --> 08:24.220 OK, so what we'll do is we'll change this to one zero to three, so now we have. 08:25.570 --> 08:32.060 Now, we should be able to map Digresses says that it is capable of handling one zero two four elements, 08:32.110 --> 08:34.110 so it should be of 16 BITRATE. 08:34.240 --> 08:37.370 So we will just change this to nine down to zero. 08:37.390 --> 08:39.030 Now, addresses has been updated. 08:39.310 --> 08:45.490 And one more thing that will be doing is now instead of eight, which we wish to store today to so we 08:45.490 --> 08:49.330 have increased depth as well as the element size. 08:49.690 --> 08:56.390 And for that reason, Dean should also be increased to 32 and the out should also be increased to 32. 08:56.710 --> 09:03.010 So without changing now, the rest of the pack will work just fine because I trust is also capable of 09:03.010 --> 09:11.550 handling one zero two four element and being in doubt is also capable of handling the correct elements. 09:12.100 --> 09:13.400 So we'll just see Rockwool. 09:13.900 --> 09:16.900 And then what we'll do is we'll again performance. 09:16.900 --> 09:22.280 And this will be finding as soon as see who'll be getting a status that syntheses out of there. 09:22.540 --> 09:24.550 So we'll just go ahead and perform. 09:24.670 --> 09:25.560 And this is OK. 09:25.810 --> 09:32.350 And this will give us an idea how, depending on the size and we have specified, we want to automatically 09:32.350 --> 09:34.760 choose a different kind of limit. 09:34.950 --> 09:41.470 OK, so in the previous case, when we have a depth of 64 and the size of it, we want to have choosing 09:42.310 --> 09:43.750 distributer memory for us. 09:44.140 --> 09:49.760 And now we have increased our depth to one zero two four and the size to 32 bit. 09:50.080 --> 09:52.300 Now let's see what we will choose for us. 09:55.660 --> 10:00.550 So we'll just open our synthesis design and then we'll just reload our schematic. 10:02.450 --> 10:04.710 This will go ahead with schematic. 10:07.570 --> 10:13.740 And then you'll be finding no, if I just to minimize it, so here we have Rham. 10:15.830 --> 10:17.440 Thirty six even, right? 10:18.140 --> 10:21.830 So I just go ahead and I'll try to explore the. 10:22.600 --> 10:24.350 So now we have a date. 10:25.130 --> 10:25.550 No. 10:26.540 --> 10:32.660 This is the first week of invoking a memory that if you follow a generalized code, you declare energy 10:32.990 --> 10:39.500 and you write a normal call for your arm, and that will lead to a different kind of memory depending 10:39.500 --> 10:41.660 on the choice of what we want. 10:41.680 --> 10:48.140 OK, so the best choice will be predominantly decided by the world or depending on the requirement that 10:48.140 --> 10:48.890 you have specified. 10:51.940 --> 10:57.090 And the difference will be finding is usually when you have a lower debt as well as a lower elements 10:57.130 --> 11:00.250 case, we will always choose a distributor. 11:00.670 --> 11:07.840 Whereas if you considered an higher debt as well as in higher basis, usually we might go with a block. 11:08.230 --> 11:14.320 OK, this doesn't give us more flexibility because here we are choosing a company for us. 11:14.560 --> 11:21.550 And as an engineer, we in a simple case it is we will be preparing to go with this method. 11:21.550 --> 11:27.610 But in most of the cases we define, we strictly need to know which component we are utilizing in our 11:27.610 --> 11:27.940 design. 11:28.060 --> 11:34.570 OK, so now we'll understand how to specifically invoke a component for choosing the specific kind of 11:34.610 --> 11:36.730 memory inside our system.