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Rehab a test bench for the universal shift register.

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And so I'm just going to kind of quickly run through and just show you different parts of the test bench

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and you can kind of see what's going on to give you an idea of what to expect when you're creating a

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test bench.

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So the first line we have a library instantiation where we call in show libraries which we're now I'm

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sure you're somewhat familiar with.

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And we also have the libraries that are only use in the test bench on line 6 and 7 9 9.

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We're calling it a custom package that when you get to the lab section and you have to start creating

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and test benches I give you the files you need and show you how to them how to structure your folder

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so that you can use the sim them in that package.

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And we have the entity declaration which is called test us are then our component USAR which is the

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beach of design.

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We want to test and we go ahead and define the signals and constants.

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We're going to use to actually test universal shift register and then right or anything begin we have

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our device running tests which is us our go ahead and use a generic map port map to go ahead and generate

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this universal shift register and then we have our stimulus process.

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And in our stimulus process we have several different variables in that line right.

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And what these do are they're going to read in values from a text file or from a text file we're using

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and that will go ahead and essentially we're going to take these ideas from that infamous text file

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and it's going to compare him to the baddies.

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We actually get from the actual universal shift register and make sure the inputs match the outputs.

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And so that's essentially exactly what's going on here.

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We are reading in these by an input line in char and we're converting them to ask you to hack's which

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is what the function is declared and send them.

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And it all package and then we're going to read the line output line.

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We have a clock that we're toggling in 0 and 1 and then we have this wait for 10 seconds which is allows

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us to wait and toggle our clock back and forth and then we do have at the very end we kind of have a

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this this error reporting where if it's successful or if there's no we don't count any errors then we

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know it's a success and we can say success us our task completed.

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However otherwise we know that our device is broken or you can write whatever whatever type of warning

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you would like to use.

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Now I was just kind of a quick overview of what the U.S. Our testbench is like.