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With the full hour here we have an example of a four hour in a data flow sort of type of structure or

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architecture and just looking at it on the right.

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We've got the digital logic circuit of a full outer or three and puts x y and s.i and then we have our

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outputs s and CEO or carry out.

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And if you look on the left on in our viewer DL file on lines 5 is where we have our entity declaration

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where we're declaring that the are is for one which is describing what our actual circuit is and then

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we have the port which is orbit of finding the inputs and outputs.

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And you can see that we have assets and see out of the outputs which if you look at the digital circuit

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that is the same as an SEO which is calling us you know I mean for inputs X Y and C.

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And so just looking at you you can see that that's kind of how it correlates.

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Now the architecture on line 14 is where we're actually describing what is going on.

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And so if you look you'll see in the architecture we have 1 2 and gates.

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If you look at the digital logic circuit you see we have two and Gates as well.

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And also if you look in architecture where you've got two three exclusive OR gates that take the back

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side we have two three exclusive OR gates.

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And if you look just between the digital logic circuit on the right on the beach you know you can see

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that the two correlate.

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So looking at the sea out it is equal to see in ANDed with X exclusive board with Y.

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If you look and see if we have X and Y there being exclusive award and then we or that value with X

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and Y and so just just following the actual architecture of the four outer one we can see that it's

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doing exactly what we're describing exactly how we want the gauge to place how many gates we want and

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where we want them to placed.

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And so that's kind of idea when you're working with the data flow.

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That's essentially what you're doing in here.

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More important though just want to show you that if you look on the VHDL file we have our poor where

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we define or put X Y and C in our outputs S and C out and this is all an entity section of the four

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outer.

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And if you look in the architecture section this is where we're defining what's actually going on.

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So the architecture section is the actual gates and the signals between the gates connecting everything

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together.

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And that is defined in the architecture section.

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After we have the begin keyword we define what are see out in what Guess how these outputs are defined

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based upon the inputs where you have declared and the statements.