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Sorrels I have my own designs.

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I've got a directory on my computer which look under libraries Documents directory VHDL designs and

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it's of there I've got several folders where I kind of categorize Metafont design.

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They've gotten advanced designs things that are specifically for the basic seaboard combinational logic

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and sequential logic.

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So if I do and what the sequential logic here I've got all these different designs counters.

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The flip flops x 7 Lache.

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When are you back shift registers.

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So on and so forth and inside each one of these it's like for example I have counter one.

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If I click inside counter one I have a project in here that a court has project.

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But essentially I want to make sure that I have counter one which is my the h d file or go ahead and

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open that I'm going to edit it with notepad plus plus.

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And you'll see that the entity has counter 1.

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So I can try to keep that consistency where I have my entity count or 1.

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And you'll notice my folder for counters one inside of I want to make sure I have a testbench which

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is just called Cast on the square count or 1 and then also have a TCO file count and one TCO which is

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just a little script I use to simulate.

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And so this is a good way to kind of keep all of your designs organized.

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So if I'm going to create a new project where I want to have like I need to have say a counter or just

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go to my VHDL designs directory look at my sequential logic and I've got two different counters I can

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use.

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And as long as you name them in a way that you understand I've got a hex to 7 segment display a kind

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of latch.

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I go on my watch directory you can see that I've got the shell design file the testbench file and it

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took a script to run the testbench in all these different for every different design I do I have one

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of these in here I've got another lache veneer feeback shift register.

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And if I even go to like my advanced designs I don't have as many in there but I've got encryption RC

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servo you Art receiver and transmitter and memory initialization.

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Or if I go to I'm a combination of logic I've got adder's decoders the Flader located here pulsed with

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modulation.

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So if I with more pulses modulation I've got the HD file which is the design file and the testbench.

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And so this is a good way to make sure you've got to organize in a way that you can easily access your

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files to your library grows it's going to get harder and harder to kind of access more and more.

