WEBVTT 00:13.070 --> 00:19.970 Welcome to variable's signals files and Constance the deal in this lecture I'll explain how variables 00:20.270 --> 00:26.000 signal's files and constants are use and HDL designs. 00:26.000 --> 00:31.080 First we have this term called data classes as in any other programming language. 00:31.120 --> 00:37.940 VHDL contains different data types and also to further you have a data type and you have a data class 00:38.160 --> 00:45.920 to each data type specified by data class and in VHDL there are four different data classes which we 00:45.920 --> 00:50.700 have signals constants variables and files. 00:50.860 --> 00:58.700 Signals are an object with the current value and projected values and the projected values can be changed 00:58.730 --> 01:00.850 as many times as possible. 01:00.860 --> 01:05.410 These are one of the most common class you'll use in your designs. 01:05.450 --> 01:12.050 These are if you think of signal there what's inside of your FPGA or CPB or whatever you're trying to 01:12.050 --> 01:18.830 write in your VHDL design and we use the signals to construct construct internal buses shift registers 01:19.190 --> 01:22.630 Ramm or almost any other type of digital circuit we create. 01:22.760 --> 01:26.040 We are going to create signals. 01:26.180 --> 01:33.650 Variables are an object only with a current value variable values can be changed as many times as desired. 01:34.010 --> 01:39.740 And they go away after synthesis these typical when we have a variable we use it inside of a process 01:40.100 --> 01:42.200 if we want to perform something sequentially. 01:42.440 --> 01:48.980 But the most common thing we use them for are the construction of Gates components or other pieces of 01:48.980 --> 01:50.100 digital hardware. 01:50.300 --> 01:56.900 When we actually are creating our design we're mostly going to use signals what we will do is use variables 01:56.900 --> 02:02.760 to help route and construct the signals and constants. 02:02.810 --> 02:07.820 These are objects whose value cannot be changed after it is initially specified. 02:07.820 --> 02:14.870 These are most valuable when you have a large design and if you have something say a clock speed you 02:14.870 --> 02:20.390 can define a constant and call it clock speed and give it a value. 02:20.690 --> 02:25.520 And if you use it like 10 or 12 or hundreds of other times in your design instead of going through if 02:25.520 --> 02:31.160 you want to change your clock speed having to change a hundred lines of VHDL code you can just change 02:31.160 --> 02:36.140 that constant one time and it'll propagate through your entire design. 02:36.350 --> 02:43.310 So for example we have a constant we would give it the constant which is our data class clock count 02:44.000 --> 02:47.110 an integer and we give initial value of 50. 02:47.120 --> 02:51.250 Now once we call our count and it's a value of 50 we can never change it. 02:51.260 --> 02:56.020 It will be 50 throughout the entire design if I try to assign another value to count. 02:56.180 --> 02:59.720 I would be an error and tell me you can't do that count as 50. 02:59.720 --> 03:02.450 It can never be changed. 03:02.470 --> 03:06.320 We can also use constants to define constants later on. 03:06.320 --> 03:11.710 So for example we have a constant where coin clock freak for for frequency. 03:11.780 --> 03:13.310 And it's an integer value. 03:13.430 --> 03:19.310 Then we have a second constant we call it Max clock count and it's another integer value that we're 03:19.310 --> 03:26.960 saying the max clock count is equal to clock frequency divided by baud which are baud as another constant 03:26.960 --> 03:28.360 we had to find. 03:28.400 --> 03:33.920 So this is where you can have all these constant set up where you just change one value such as your 03:33.920 --> 03:40.490 clock frequency and you automatically calculate your Bodd your max clock count or other constants along 03:40.490 --> 03:41.000 the way. 03:41.030 --> 03:44.250 And so conses are very useful in your VHDL designs. 03:45.800 --> 03:53.540 Files these are an object that consist of a sequence of values which we have text files or cxxviii files 03:54.410 --> 03:56.200 in a Synthes sizable design. 03:56.270 --> 03:58.070 We won't actually use files. 03:58.070 --> 04:04.730 The only way you may use these argument initialize like memory values inside your design but most commonly 04:04.730 --> 04:09.170 with a file class is only for test benches for simulation. 04:09.200 --> 04:16.550 You can actually read values in from the files and take these values to apply to your stimulus. 04:16.580 --> 04:18.320 Now you're familiar with all the data classes. 04:18.310 --> 04:21.510 Next we're going to learn about the different data types.