WEBVTT 00:12.950 --> 00:18.670 Walk over to the VHDL did type introduction and this lecture I'm going to introduce the different datatypes 00:18.700 --> 00:21.970 associated with the HGL. 00:22.270 --> 00:30.910 First we have data classes which are used to describe the data types based on data class will limit 00:30.910 --> 00:35.390 you or allow you to do certain things with that specific data type. 00:35.410 --> 00:41.950 So the day classes are we have constants signals variables and files. 00:41.950 --> 00:47.650 So with constants at a high level they are a value that can never change. 00:47.710 --> 00:54.700 A signal is a value that is constantly changing inside of your design and a variable is something we 00:54.700 --> 01:01.930 use to help you construct your designs and files our views and test benches to help you simulate and 01:01.930 --> 01:04.160 verify your design is working properly. 01:05.450 --> 01:10.630 The data types we have here are a number of data types we'll be using in the HDL. 01:10.640 --> 01:19.580 We have a standard logic standard logic vector and unsigned signed integer and a boolean data type. 01:19.940 --> 01:23.800 Each data type is associate with that data class except for files. 01:23.990 --> 01:26.140 Those we're using for simulations only. 01:26.270 --> 01:31.240 So for example we had the constants and the signals. 01:31.370 --> 01:36.530 So I could have a constant That's a standard logic and I could have a signal that the standard logic. 01:36.590 --> 01:42.170 And based upon the different types if it's a constant state in logic it can never change or it's a signal 01:42.170 --> 01:43.040 standard logic. 01:43.040 --> 01:44.720 Now that value can change. 01:44.720 --> 01:51.200 So based upon the data types and the data class that you're using it will dictate what you can and can 01:51.230 --> 01:57.050 do with that specific signal or constant or whatever you are you're working with the kind of help you 01:57.050 --> 01:58.380 create your designs. 01:59.660 --> 02:02.840 So why do we use data types inside of an FPGA. 02:02.840 --> 02:04.780 Everything is a one or zero. 02:04.820 --> 02:06.410 Just like a computer. 02:06.830 --> 02:12.020 Well the reason wreathing data types is this allows us to group these ones and zeros in a way that's 02:12.020 --> 02:14.050 easy for us to understand. 02:14.210 --> 02:19.340 If we see a group of one and zeros inherently to the human eye it just doesn't really make a lot of 02:19.340 --> 02:19.760 sense. 02:19.760 --> 02:22.110 It's hard to understand what's going on. 02:22.130 --> 02:29.930 But if we can see a number like say ninety nine 100 101 102 to us it's easy to tell it OK. 02:29.950 --> 02:31.440 That number is counting. 02:31.460 --> 02:33.110 And so that's the reason we use data types. 02:33.110 --> 02:39.110 It helps us group these ones and zeroes so we can make our design happen in a way that's understandable 02:39.110 --> 02:46.910 to us humans that the computer or your FPGA can then interpret and execute these commands enough talking 02:46.910 --> 02:47.780 about the data types. 02:47.780 --> 02:49.520 Let's actually learn the specifics.