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In a lab for hack's to seven segment display 7 segment display the Base to board contains four seven

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segment displays.

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We will be using two of them for this assignment seven segment displays are useful for conveying data

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easily for humans to read.

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We will be using the two displays to represent a single byte which is 8 bits of data which is represented

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by the switches on the bases two board bases two board user guide.

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Here are some images I pulled from the bases to user guide the 7 segment displays on the base is to

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board or comany and this means that the anode or negative sides of the Pleiades are connected to each

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other in order to light up a segment we need to drive a logic zero on the output.

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Also know that the displays are tied together.

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So we need to multiplex the outputs of the display.

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Another thing to look at is that we are using the N.P. transistors to drive the display.

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So you need a logic zero to allow current to flow through Moulson simulation.

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Note that we are only simulating the Hexa servants.

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VHDL file the top level VHDL file lab for the HD will not need to be simulated Here's a tasking for

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lab for modify and simulate the Hexis 7 SAG VHI the file in Moulson to verify it is working correctly

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modify the lab for VHDL file to create two component instantiations implement the lab for BHB design

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onto the basis to board.

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You see if happening using the U.S. file I have given to you here are the locations of all the different

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entity port numbers.

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You've just completed lap 4.

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Here are the outcomes I understand.

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Hi multiplexers circuit works these VHDL processes to create a counter that will slow the 50 megahertz

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clock down.

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This is important to multiplex the 7st display become more familiar with the Xilinx IAC toolset.