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How can we describe the vending machine FSM in this lecture will guide you through the implementation

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of the vending machine, FSM explained in the previous lecture.

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So our goal is implementing this.

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Let's create a new White House project with the name of vending underscore machine dashboard to choose

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a top function name and select the basis tree as a target FPGA board.

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Creative design header file with the name of vending underscore machine that age and the design source

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file with the name of vending underscore machine that CPB make sure that the creative files are located

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inside the project folder.

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Accordingly, create the test, potentiator and Sourcefire.

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Open the design header file and include the AP underscore into that, why not open the design source

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file, then include the design header file and define the enumeration data type to define the states.

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Let's define the top function with seven arguments for inputs and outputs.

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It is better to add port interfaces right now, then define a static variable as a design the state.

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And find the corresponding temporarily valuable.

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It is a good practice to define temporary variables for the outdoor arguments.

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Now we should define the state machine using a switch case statement.

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Then we should update the state register and out.

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Initially, the circuit is in the city zero state ready for accepting a purchase.

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Based on the input, the state machine goes to five star 10, oreste 25.

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Similar behavior happens in Stiffy five to 10 to 15 and 20 states.

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In the 25 states, the circuit doesn't need any inputs, it gives you a candy and those to the sweet

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state.

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Similar things happen in states estie 30, AC 35 to 40 and 44.

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And that's why it stayed the vending machine is waiting for you to pick up your candy and change, then

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it goes to zero, ready for the next request.

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This code implements the whole state machine, except the system requires transition as a system.

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Reset is added to the design by the tool automatically.

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We should guide the tool to set up the research signal properly.

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For this purpose.

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Right, click on the solution one folder and select the solution settings option, then expand the config

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archil, go to the reset section and select the all option under the reset feature.

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This applies the reset to all registers in the design, including the state register.

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Therefore, resetting the system.

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Reset the state machine.

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Now, we should try to test bench codes.

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Open the test bench, identify and include the design header file and define the design top function

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prototype, open the test by Sourcefire, defined the main function and the status variable.

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Let's define a couple of variables corresponding to the top function arguments.

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It is a good idea to define a function that describes putting a coin in the machine.

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This function receives three arguments corresponding to the three coin types.

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Note that only one of these arguments can be one at a time.

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As we can only insert one coin at a time into the windish first, the function calls are designed to

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function with the arguments in which one of them has the value of one.

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Then it prints the variables on the screen for an inspection, it then calls the design function assigning

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zero to all arguments just to add some delay between to coin insert operations.

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Now, let's call this a function for inserting two dimes and the quarter into the winnings.

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Now we are ready for performing the simulation.

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As can be seen in the test bench output, after accepting the cones, the machine gives you a candy

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and two dime coins.

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Let's start from the high level synthesis analysis perspective confirms the article, Single Cycle Design

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Implementation.

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After performing the article Psycho Simulation, we can inspect the waveforms to understand the circuit

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behavior and perform cycle accurate debugging.

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Finally, we should export Aadil IP ready for integration in every other project.

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Now that we have the Arthel IP for the vending machine, we should instantiate that in every Ghandour

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project and generate that FPGA bitstream.

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The next lecture will cope with this task.

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This is our takeaway message in the solution setting window, it can determine the design registers

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that should receive the system.

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Now, the police question, right, a test meant to insert three nickels and one called.
