1
00:00:01,900 --> 00:00:08,950
How can we evaluate a pipeline micro architecture in this lecture will introduce a few performance metrics

2
00:00:09,310 --> 00:00:14,310
that can be used to evaluate the pipeline, the implementation, to compare that with others.

3
00:00:18,410 --> 00:00:24,620
By now in this course, we have learned how to design a logic circuit using the single cycle design

4
00:00:24,620 --> 00:00:29,150
approach and single cycle initiation into world pipeline design.

5
00:00:30,530 --> 00:00:37,190
And the first approach, the circuit is ready to accept inputs in each cycle and the output is ready

6
00:00:37,190 --> 00:00:38,970
to be used in the next cycle.

7
00:00:39,470 --> 00:00:42,610
In other words, the latency of the circuit is Walke.

8
00:00:45,260 --> 00:00:51,350
Please recall that a digital circuits latency is defined as the number of clock cycles between applying

9
00:00:51,350 --> 00:00:57,800
a data to the circuit and the corresponding circuit output availability in the second approach, the

10
00:00:57,800 --> 00:01:00,860
circuit is ready to accept input in each clock cycle.

11
00:01:01,190 --> 00:01:04,100
In other words, the initiation interval is one.

12
00:01:04,670 --> 00:01:09,700
However, in this case, the latency of the circuit is more than one clock cycles.

13
00:01:10,430 --> 00:01:16,640
That means the output corresponding to the input is available to be used a couple of cycles after applying

14
00:01:16,640 --> 00:01:17,170
the input.

15
00:01:17,780 --> 00:01:25,580
For example, the design latency in this diagram is three cycles apart from initiation interval and

16
00:01:25,580 --> 00:01:31,880
latency, and another parameter is important in designing sequential circuits, and that is throughput.

17
00:01:32,420 --> 00:01:39,650
Throughput is simply defined as the speed of generating output data in both designs in each clock cycle

18
00:01:39,800 --> 00:01:42,260
and output data is available to be used.

19
00:01:49,960 --> 00:01:55,570
There are two design approaches explained in the previous a slide provide efficient implementations

20
00:01:55,870 --> 00:02:03,100
for sequential circuits such that they can accept inputs in every class cycle and provide the maximum

21
00:02:03,100 --> 00:02:05,340
throughput available to an application.

22
00:02:06,100 --> 00:02:11,640
Therefore, they deserve a unique name to be referred throughout discourse and future courses.

23
00:02:12,430 --> 00:02:18,190
We call them single cycle initiation interwove or askey for short.

24
00:02:23,200 --> 00:02:30,280
By now, we have defined three performance metrics initiation, interval, latency throughput.

25
00:02:31,460 --> 00:02:36,170
Initiation turmoil represents the speed that the circuit can accept new inputs.

26
00:02:37,770 --> 00:02:44,820
Its unit is clock cycles, latency represents the timing between an input and its corresponding output,

27
00:02:45,330 --> 00:02:49,800
this parameter can be represented as a number of clock cycles or seconds.

28
00:02:51,740 --> 00:02:58,200
Throughput represents the speed of generating output data, the unit of this parameter is usually beats

29
00:02:58,250 --> 00:03:00,830
per second or beats per classical.

30
00:03:05,150 --> 00:03:10,430
How can we demonstrate the initiation interval latency and throughput in an example?

31
00:03:11,560 --> 00:03:13,750
The next lecture will cope with this question.

32
00:03:18,360 --> 00:03:25,920
These are our takeaway messages, initiation into one latency and throughput of three metrics to evaluate

33
00:03:25,920 --> 00:03:33,810
the performance of a pipeline circuit in Alaska design approach, the circuit can accept input and generate

34
00:03:33,810 --> 00:03:35,850
output data in each cycle.

35
00:03:39,690 --> 00:03:43,260
Now, the quiz question, a pipeline circuit reads.

36
00:03:44,620 --> 00:03:51,490
According to the following timing diagram, a pipeline circuit reads 30 tweets and writes 64 bits of

37
00:03:51,490 --> 00:03:52,460
data into memory.

38
00:03:52,780 --> 00:03:57,220
What are the values of initiation, interval latency and throughput?