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In the previous lectures of this section, we understood how to use switch-case software statement to 
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describe decision-making processes and encoder/decoder circuits. Also, we realised how the general form 
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of a multiplexer in hardware can implement these circuits. In this lecture, 
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we take another circuit example called leading one, that can be described using a similar approach. 
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Here, we are going to design a combinational circuit that finds the index of the leading one in a 9-bit
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binary number. 
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The leading one of a number is the most significant 1 in the binary representation of the number. 
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The circuit should return -1 if the number is zero, which means it doesn’t have any 1 in its 
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binary representation.
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For example, the index of the leading one in 174 is 7.
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The index of the leading one in 38 is 5.
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The index of the leading one in 430 is 8.
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The index of the leading one in 1 is 0.
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And finally, the index of the leading one in 0 is -1.
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This diagram shows a conceptual block diagram for this task. 
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It has a 10x1 multiplexer and a combinational logic that gets the input number and generates the proper 
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select inputs for the multiplexer.
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As can be seen, the multiplexer inputs are the index value of a nine-bit binary number and -1. Each 
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input of the multiplexer is passed to the output based on the select input value.
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This second diagram shows another hardware strcure for the same task which consists of four 2 by 1 
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multiplexers and a combinational circuit to generate the select bits. 
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In this structure, each multiplexer determines one bit in the 4-bit binary output.
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This HLS code shows the if-else statement describing the combinational logic of the leading-
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one example.
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The code starts with the most significant bit and returns its index if it is 1 otherwise checks 
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the next bit.
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After describing the leading one code in HLS, Now we should generate the corresponding FPGA 
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bitstream and examine its functionality of the Basys3 board. The next lecture follows the HLS design 
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flow to generate the FPGA 
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bitstream.
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These are our takeaway messages.	A combinational circuit can find the position of the leading one 
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in a binary number. A chain of if-else statements can represent this circuit 
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Now the quiz question. This code implements a 4x2 encoder;
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its structure is very similar to the previous example. 
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Find the missing numbers determined by red question marks.
