0
1
00:00:01,170 --> 00:00:05,560
Transforming the data format is one of the common tasks in digital design.  
1

2
00:00:05,850 --> 00:00:09,600
This lecture will explain how to describe these transformations in HLS.
2

3
00:00:12,890 --> 00:00:18,560
Encoder and Decoder circuits are combinational logics that transform the shape of their received data. 
3

4
00:00:19,070 --> 00:00:25,430
They transform data from one format to another.  An encoder usually transforms the original data format 
4

5
00:00:25,430 --> 00:00:33,620
into a coded format for different reasons such as security, compression, transmission, error-prone 
5

6
00:00:33,620 --> 00:00:35,090
safety, to name a few. 
6

7
00:00:36,400 --> 00:00:42,160
A decoder usually performs the reverse function and transforms a coded data format into the original 
7

8
00:00:42,160 --> 00:00:49,210
data format.  A classical encoder/decoder receives n-bit input data and generates m-bit output
8

9
00:00:49,210 --> 00:00:49,540
data.
9

10
00:00:51,850 --> 00:00:58,420
Let’s take an example and clarify the concept of encoder and decoder. Our examples in this slide and 
10

11
00:00:58,420 --> 00:01:01,840
the next slide is octal to binary encoder/decoder. 
11

12
00:01:02,810 --> 00:01:09,710
The octal to binary encoder consists of eight inputs and three outputs. Each input corresponds to an octal digit,
12

13
00:01:10,160 --> 00:01:13,160
and three outputs represent the corresponding binary code.
13

14
00:01:13,940 --> 00:01:19,340
It is to be assumed that only one input is active or has the value of 1 at any given time; 
14

15
00:01:19,610 --> 00:01:21,460
otherwise, the circuit has no meaning. 
15

16
00:01:22,340 --> 00:01:30,850
For example, if input (D7, D6, D5, D4, D3, D2, D1, D0) is (0,0,0,1,0,0,0,0) then the output will be (Y2, Y1, Y0) = 100.
16

17
00:01:30,870 --> 00:01:36,140
And the input (0,0,0,1,0,0,1,0) is not possible 
17

18
00:01:36,290 --> 00:01:38,000
as two input lines are 1.
18

19
00:01:40,190 --> 00:01:47,600
The octal decoder performs the reverse function. It has three inputs and eight outputs. It receives a 3-bit 
19

20
00:01:47,600 --> 00:01:51,060
binary code and activates the corresponding octal output.
20

21
00:01:51,680 --> 00:01:59,210
For example, if the inputs are 010 then the outputs are  00000100.
21

22
00:01:59,210 --> 00:01:59,540
00000100.
22

23
00:02:01,750 --> 00:02:06,940
A classic general binary encoder in digital design is a combinational circuit that receives 
23

24
00:02:06,940 --> 00:02:14,920
the maximum of 2 to the nth power binary inputs and generates n binary outputs. Its role in the logic design 
24

25
00:02:14,920 --> 00:02:20,830
is encoding a given input and provide an encoded output which is the compact form of the input. 
25

26
00:02:21,490 --> 00:02:24,820
This table describes a 4 by 2 binary encoder.
26

27
00:02:25,150 --> 00:02:31,450
In this encoder, only one of the inputs can be 1 and others must be 0.  As it can be seen, 
27

28
00:02:31,760 --> 00:02:36,730
the output is the binary value of the position index of the only one in the inputs. 
28

29
00:02:40,060 --> 00:02:46,240
A classic general binary decoder in digital design is a combinational circuit that receives the maximum 
29

30
00:02:46,240 --> 00:02:51,220
of n binary inputs and generates 2 to the nth power binary outputs. 
30

31
00:02:51,430 --> 00:02:56,500
Its role in the logic design is decoding a given coded data and provides the original data. 
31

32
00:02:57,450 --> 00:03:05,160
This table describes a 2 by 4 binary decoder. As can be seen, only one of the outputs is 1 and 
32

33
00:03:05,160 --> 00:03:06,250
rests are 0.
33

34
00:03:06,690 --> 00:03:11,790
Also, the binary input represents the position index of the 1 in the outputs.
34

35
00:03:13,790 --> 00:03:19,670
The switch case programming structure in HLS code can be used to describe the binary encoders 
35

36
00:03:19,670 --> 00:03:25,090
and decoders. For example, let's consider this 2 by 4 binary decoder, 
36

37
00:03:25,490 --> 00:03:30,080
then this function containing a switch statement represents this decoder.  
37

38
00:03:30,890 --> 00:03:36,320
Each case in the switch statement determines one possible output value corresponding to the input 
38

39
00:03:36,320 --> 00:03:36,830
values.
39

40
00:03:37,970 --> 00:03:42,910
In other words, each case represents one row of the left-hand side table.
40

41
00:03:46,330 --> 00:03:50,160
A typical HLS tool synthesises a switch case with multiplexers. 
41

42
00:03:51,640 --> 00:03:58,210
If we consider the 2 by 4 decoder shown in the previous slide, then a 4 by 1 multiplexer can 
42

43
00:03:58,210 --> 00:03:59,980
implement the switch-case representation.
43

44
00:04:01,900 --> 00:04:08,170
Now that we have understood how to describe a classic encoder/decoder in HLS software, the next lecture 
44

45
00:04:08,260 --> 00:04:14,500
will describe more detains on using the switch-case software statement to describe similar ideas by taking 
45

46
00:04:14,500 --> 00:04:16,300
an example called leading one.
46

47
00:04:17,970 --> 00:04:23,850
These are our takeaway messages. Encoder and decoder are hardware circuits to change a data format.
47

48
00:04:24,450 --> 00:04:29,070
The switch-case statement in HLS code can represent a typical encoder/decoder circuit.
48

49
00:04:30,660 --> 00:04:36,680
Now the quiz question. Use a switch-case statement in HLS to describe an 8 by 3 encoder circuit. 
