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How can we develop a simple hardware description in C to control a few LEDs? This controller would 
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be the “Hello World!” example in HLS, through which I demonstrate essential steps of the HLS hardware development 
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process.
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Primary goals of logic circuits are processing data and controlling a wide range of systems. To achieve 
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these goals, a logic circuit should perform three tasks: receive or generate data, process data and 
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send the results out.
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The data can be received from different sources such as memories, sensors, data stream sources or other 
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logic circuits.
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These data can be in various shapes or formats. 
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The data processing can be as simple as transferring data with minor modification or performing several 
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computational operations on data. 
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The resulted data can be used to change the environment via actuators, displays or used by other logic
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circuits or be saved in memories for later usage. 
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Our target design in this course is a simple logic circuit that turns on/off LEDs based on a predefined 
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pattern.
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Therefore it has no input but has an output connected to LEDs.
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In this section, you will learn: What the HLS design-flow is, How to describe a design in C/C++,
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How to use Vivado-HLS and Vivado to create a design,  How to program the Basys-3 board with a simple 
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design to control LEDs on the board.
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This section consists of 12 lectures. The current lecture, as the first one, explains the goal and the 
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structure of the section.
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The next lecture introduces the LED configuration on the Basys-3 board. Lecture three deals with 
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with the basic concepts behind the HLS design and its relation with the Xilinx toolsets.
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The overall design flow is explained in lecture four. Lecture five briefly describes the Vivado-HLS design 
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flow.
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Then we will be prepared to describe our design in C/C++ in the sixth lecture.
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The hardware port concept and its description in C/C++ are explained in Lecture seven.
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Lecture 8 is where we use the Xilinx Vivado-HLS toolset to describe and synthesise 
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our LED controller code.
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Lectures 9 and 10 cover the techniques to import the synthesised HLS design into Vivdo toolset for logic 
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synthesis.
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After generating the FPGA bitstream, in lecture 11 we will program the board and examine the results 
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on the real Basys-3 board.
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Finally, lecture 12 provides some exercises for a better understanding of the topics explained in this 
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section.
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What is the Basys3 board configuration for accessing the LEDs?
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The next lecture will answer this question.