1 00:00:00,600 --> 00:00:01,510 Hello guys. 2 00:00:01,620 --> 00:00:04,780 Welcome to a physical design with MATLAB and simile. 3 00:00:05,430 --> 00:00:06,810 We are from digital an example. 4 00:00:08,160 --> 00:00:18,600 So in this course we are having seasons two real seasons and elaboration of FPGA design flaw with MATLAB 5 00:00:19,040 --> 00:00:28,310 willing and its sub programs its system generator he has a recorder and you'll verify it. 6 00:00:28,350 --> 00:00:33,430 So here we have our 6 some overview which we already completed on. 7 00:00:33,750 --> 00:00:38,290 So we are in now 6 and 4 before 6 and 4 without interruption. 8 00:00:38,370 --> 00:00:45,960 See some easily is not matched up simulation and systems in order as well as as your core lactation 9 00:00:46,050 --> 00:00:50,330 and these 6 and 4 is actually it was designed with a gel core. 10 00:00:50,360 --> 00:00:53,990 So we are going to utilize that as dual core. 11 00:00:54,030 --> 00:01:01,600 How do we do ships in a language quarter for generating yes diesel from our Matlab programs are similar 12 00:01:01,800 --> 00:01:06,650 models so we can generate as dual from our Matlab project or Matlab programs. 13 00:01:06,660 --> 00:01:14,730 That is dot M. programs for them pi programs and we can also do in a digital form similar models of 14 00:01:14,730 --> 00:01:21,000 similarly blowup design so we hadn't left two or three know we have creating IP on Matlock. 15 00:01:21,110 --> 00:01:22,500 What is your order. 16 00:01:22,800 --> 00:01:26,160 So we are going to create elements noise filter IP. 17 00:01:26,490 --> 00:01:29,370 So I'm talking about like two or three. 18 00:01:29,370 --> 00:01:36,630 We have that as the necessary sources in the video that has been so you can go to resource available 19 00:01:36,630 --> 00:01:44,100 sex on your desk and you can download that sex sample as your quarter Aramis sources deep and you can 20 00:01:44,100 --> 00:01:45,480 extract that file. 21 00:01:45,660 --> 00:01:54,410 We are going to utilize that G file and we will copy that file inside the defile to our project Victorian 22 00:01:54,720 --> 00:01:56,280 next last season. 23 00:01:56,850 --> 00:01:59,840 So I'm talking about how did IP go. 24 00:01:59,850 --> 00:02:07,220 Actually I read intellectual property so which is legacy building block a logical blub so that building 25 00:02:07,220 --> 00:02:15,590 block have some how to some of the language and presentation are ideal representation in the back end. 26 00:02:15,590 --> 00:02:24,620 So that building block actually is the top layer so view of the design so we can integrate that building 27 00:02:24,620 --> 00:02:27,140 block with all the things or the course. 28 00:02:27,530 --> 00:02:33,920 So basically IP are like a building block a logical building block which can utilize it multiple times 29 00:02:33,950 --> 00:02:40,870 and we can make us design more simplified and we can target our design. 30 00:02:40,910 --> 00:02:49,210 It's D pretty fine time to market em so I it actually can have two types of categories. 31 00:02:49,210 --> 00:02:57,520 That is how the hard court and other from courts and our softcore so hardcore sort of physically manifestation 32 00:02:57,520 --> 00:02:58,200 of IP design. 33 00:02:58,210 --> 00:03:05,440 Those are actually physically instantiated form courts are like semi hardcore so they can be configure 34 00:03:05,530 --> 00:03:07,230 and they can be tied up and soft. 35 00:03:07,240 --> 00:03:14,060 Courts are like flexible goods which can be created from is deal so hardcore are previously insulated 36 00:03:14,060 --> 00:03:22,060 in the chip that is FDA ASIC and Frank was the state of course which can be instantiated by some sort 37 00:03:22,060 --> 00:03:26,740 of programs like undergoing what Pico blades we can extensively pick people blades on a Spartan series 38 00:03:26,740 --> 00:03:33,770 of FPGA and make ability absolutely heartless and soft cost can be our IP our IP means we haven't cleared 39 00:03:33,790 --> 00:03:41,020 L.A. nice for that IP that is soft core so there are different types of IP wardens I because and we 40 00:03:41,020 --> 00:03:47,560 can have IP of different blocks actually we can get it any type of IP actually IP just a representation 41 00:03:47,560 --> 00:03:51,350 of how design is deal design or is generally at least. 42 00:03:51,590 --> 00:03:57,670 So we're going to have an example of it like we are IP elements nice for that IP control IBP say IP 43 00:03:58,210 --> 00:04:02,540 and different processor IP inside our design tool. 44 00:04:02,590 --> 00:04:09,850 So if we talk about of design suite or I use Design Suite in Rivero must obtain work on IP formats so 45 00:04:09,850 --> 00:04:18,130 we have to get everything in IP and we can integrate that our custom IP with whether initially design 46 00:04:18,160 --> 00:04:26,070 IP from Xilinx or if we talk about I use a design there is type of source which is IP courses so Xilinx 47 00:04:26,080 --> 00:04:32,560 are destroyed all different types of IP in that I before source a repository so we can all that source 48 00:04:32,830 --> 00:04:37,330 and instantiate you know on program so basically we are talking a lot about us so we've already has 49 00:04:37,330 --> 00:04:46,750 very Edis interface for IP creation IP design and IP management so we can manage good design IP very 50 00:04:47,320 --> 00:04:54,280 easily within a few clicks we can get our custom IP and we need to have some idea about a structural 51 00:04:54,280 --> 00:05:01,690 design methodology of deal that is built over beers deal and we can generate our IP be how we what we 52 00:05:01,740 --> 00:05:09,700 consider IP from Matlab so basically we are going to create elements noise filter from this might seem 53 00:05:09,700 --> 00:05:16,710 willing interface and weather to export that IP into the right of format or ISP format from this station. 54 00:05:16,840 --> 00:05:23,620 So as your caller is already we talk about as you call it actually provides or allowed us an interface 55 00:05:23,620 --> 00:05:30,460 for converting Matlab products or Matlab source or assembling models into a format. 56 00:05:30,500 --> 00:05:36,430 So the ideal quarter candidate and individual that is being vigilant here looks or as a quality heavily 57 00:05:36,550 --> 00:05:40,420 utilized for FPGA design and ASIC design. 58 00:05:40,960 --> 00:05:50,470 So Xilinx and Intel all data tools allows some support interface like it systems enable usual quarter 59 00:05:50,470 --> 00:05:57,330 for implementing effigy design flaw with MATLAB links with Asia quality just the example of such type 60 00:05:57,330 --> 00:06:04,090 of interface so agent work generates Genevieve's hardware this source utilizes estimate also so we can 61 00:06:05,080 --> 00:06:13,300 get ideas about how do the resource utilized design doing due diligence realtime FEC or so so untangling 62 00:06:13,300 --> 00:06:18,720 what configuring educator with MATLAB assuming link and I see fourteen point seven we have her so mischief. 63 00:06:18,850 --> 00:06:26,260 So if you are working with ICD entreat any was enough ICD entry then you can take deposit compatibility 64 00:06:26,260 --> 00:06:27,870 off your IEC and matlab. 65 00:06:27,910 --> 00:06:32,800 Actually we are already talking about that competitive routine Foss section so you're going to go through 66 00:06:32,800 --> 00:06:34,090 that presentation actually. 67 00:06:34,090 --> 00:06:40,340 We also have that as the presentation in corresponding sessions so you can again be doing that. 68 00:06:40,360 --> 00:06:45,520 And here are some steps actually we're going to talk about only the B virus or if we are successful 69 00:06:45,520 --> 00:06:51,450 integrate the icy quarter then we can see here. 70 00:06:51,510 --> 00:06:58,080 So this is the confirmation of after instantiation are like configuration. 71 00:06:58,080 --> 00:07:06,760 So after we configure we we see these type of outcome console and again now we can download it as a 72 00:07:06,910 --> 00:07:09,540 file in this video and we can copy that. 73 00:07:09,930 --> 00:07:19,130 Yes deal or elements into our new folder we can get Matlab FPGA matlab and refugee for inside of C local 74 00:07:19,290 --> 00:07:20,910 C or any with the local. 75 00:07:21,390 --> 00:07:28,980 And we can go to all that out and mess that excel at studies simply modify actually this configuration 76 00:07:29,250 --> 00:07:38,100 steps for IEC and matlab and every open that symbolic fight we can see this type of design block design 77 00:07:38,190 --> 00:07:45,090 and actually we're going to talk with more on how to configure it as you look water format of smelling 78 00:07:45,160 --> 00:07:51,750 B These add some like we are not going to utilize indices system but having these libraries will allow 79 00:07:52,200 --> 00:07:56,970 you to design for them but for zinc platform so we are not going to utilize these two libraries for 80 00:07:56,970 --> 00:07:59,280 this season or for this lab. 81 00:07:59,550 --> 00:08:07,390 So we are we might need these libraries in another undocking what configuration of educator with regard 82 00:08:07,390 --> 00:08:08,940 to seventeen point two. 83 00:08:08,940 --> 00:08:15,550 Here are some missteps so we can confirm that our Matlab 16 A6 and Mi 17 a probably about a and went 84 00:08:15,550 --> 00:08:24,010 to a D Xilinx and sort of seat so we can utilize these double bars on a matlab fodder move out a seventeen 85 00:08:24,010 --> 00:08:29,710 point two how we what we are going to utilize and b this is that's all working so we do so with the 86 00:08:29,710 --> 00:08:35,950 demonstration we b but you don't need to install today we actually if you like to integrate then use 87 00:08:35,950 --> 00:08:39,600 it follow this system issues and we are doing it. 88 00:08:40,020 --> 00:08:46,720 So I think we still have audio so you can insulate the target that is unlicensed which we have thought 89 00:08:46,740 --> 00:08:48,410 on the 6 first. 90 00:08:48,540 --> 00:08:50,820 So we are separate in addition and we also appreciation. 91 00:08:51,240 --> 00:08:59,140 And if we had installed our if our design suite in this type of trajectory that is local exceeds Xilinx 92 00:08:59,260 --> 00:09:02,990 virus I if my to be be part of that beauty excellent the location. 93 00:09:03,450 --> 00:09:06,450 Without a doubt that pile for spending was enough. 94 00:09:06,690 --> 00:09:12,930 So if you have seventeen point one then you can send your dirty like is represented here for seventeen 95 00:09:12,930 --> 00:09:22,810 point two and you can copy that link link location data location and you can Rhonda Matlab come on and 96 00:09:22,810 --> 00:09:27,810 you can you can enter the on like Angel setup tool. 97 00:09:28,020 --> 00:09:35,100 But research I was told we do Lim I was to be a Mr. presiding bishop before I was to become I I was 98 00:09:35,100 --> 00:09:41,880 to do it but I was Tobi karma and here is the part that is bad for that file that is part of that fight 99 00:09:42,360 --> 00:09:49,850 and you what I see we have been we have instantiate the icy that e actually pi location but we are talking 100 00:09:49,860 --> 00:09:57,450 what we are in this in this light so we have location of verified Sato we can forget we will get some 101 00:09:57,510 --> 00:10:04,370 confirmation message actually we just stop this section and after we configure then we can again see 102 00:10:04,370 --> 00:10:13,080 the downloaded file which has been at us in this video so you can see inside that there is as you recorded 103 00:10:13,980 --> 00:10:20,820 elements so we are going to delay that further and you can copy that edge look what at this in do new 104 00:10:20,820 --> 00:10:27,660 folder called Matlab aren't easy or any for looks like you can even what are you going to say at that 105 00:10:27,990 --> 00:10:38,200 location and if you want to open project from that download to follow it then you can just James your 106 00:10:38,200 --> 00:10:43,510 look is in C columns as you might have for that folder in downloads user downloads and you can go to 107 00:10:44,050 --> 00:10:51,530 6 and 4 AGL quarter LMA sources and you're going to have as the quarter elements so after you like set 108 00:10:51,530 --> 00:10:57,430 up the walking dead you are walking space then you can see there is elements that is an x files so you 109 00:10:57,430 --> 00:11:03,190 can just double click on elements start as an exercise that is actually humanly modified and you can 110 00:11:03,190 --> 00:11:08,780 see this type of model do so we are going through the ability with expertise in all this model so we 111 00:11:08,770 --> 00:11:16,140 have we can see we are one sign with generator actually that gives strong light so we have from walking 112 00:11:16,150 --> 00:11:23,860 space but actually these are books available it seems smelling library and we can just drag and drop 113 00:11:23,860 --> 00:11:29,590 those books and interior does blocks with well it looks like we have walks this block that actually 114 00:11:30,640 --> 00:11:37,420 imports the audio samples from the MATLAB blocks workspace actually we have one audio file in the attachment 115 00:11:37,420 --> 00:11:43,730 so you can see that audio sample simplified can be and put it by this audio you know from workspace 116 00:11:43,880 --> 00:11:51,360 block and we have two that are type conversion buckets it was gone wasn't bloody necessary for converting 117 00:11:51,730 --> 00:12:00,870 good audio a signal that is done on noise and audio we are added by the area so we need to convert that 118 00:12:01,650 --> 00:12:10,230 mixed audio signal and don't translate into fixed point format actually that L.A. block is not able 119 00:12:10,330 --> 00:12:17,510 to process the floating point out actually do the type of auditions are in 41 finance or we need to 120 00:12:17,510 --> 00:12:24,480 convert for whom brain data are flooding instantly into fixed point format so we can tune it out. 121 00:12:24,980 --> 00:12:33,380 Yes Jill from your chorus as your go to only allow us to utilize for fixed point out of kicks find. 122 00:12:33,980 --> 00:12:42,790 We have two bucks who actually are utilized for like switching the elements out and audio signals. 123 00:12:42,800 --> 00:12:48,770 And finally we can see this scope there so we can see what signals in that the scope and this deliberate 124 00:12:48,770 --> 00:12:50,300 explanation about our design. 125 00:12:50,330 --> 00:12:56,310 So we are going to utilize this as a model or symbolic model for generating as well. 126 00:12:56,330 --> 00:13:04,580 So we have some missteps actually these tapes are also going to explain in our coming lacerations and 127 00:13:04,640 --> 00:13:11,930 we'll also does this presentation in the video that has been so you can also download this presentation 128 00:13:12,110 --> 00:13:19,140 so you can also go through this and we are just talking about X it's not all these just in passed away. 129 00:13:19,540 --> 00:13:26,700 So first of all we need to do like instantiate that element subsystem block so we can click on that 130 00:13:26,760 --> 00:13:34,880 log and we can see up some dialog box and we can set up some options here and we can finally go to as 131 00:13:34,900 --> 00:13:36,800 your record edge and workflow advisor. 132 00:13:37,170 --> 00:13:45,600 So actually these optimally are able only we we configured our as a recorder from the previous slide 133 00:13:45,600 --> 00:13:46,190 actually. 134 00:13:46,210 --> 00:13:54,550 We just need to OPD at that location of the vital and insert that bad location in common Matlab command 135 00:13:54,550 --> 00:14:02,620 window so after it configured it available what advisable you want in the sim link are matlab. 136 00:14:02,640 --> 00:14:07,770 So we can configure our project for SDL generation. 137 00:14:07,960 --> 00:14:12,820 So again again go to one point one that is set target device we can set up the target device actually 138 00:14:13,570 --> 00:14:21,440 we can target interval device available on Xilinx we we can target like a Spartan or zinc are in the 139 00:14:21,450 --> 00:14:28,850 whole device actually we are targeting any silly spot and then we can target our junk. 140 00:14:28,880 --> 00:14:34,810 So when you went to the set target interface so we can we're going to instantiate DEET interface type 141 00:14:34,820 --> 00:14:41,290 that is most of the design in regard to the Reverend Jackson what did this design into to right implements 142 00:14:41,290 --> 00:14:48,640 or must of design in regard to allows us to integrate with X I was part of also all of the things I 143 00:14:48,640 --> 00:14:59,290 really wouldn't be vital I've been to greater R E X I was format so we can incented our elements noise 144 00:14:59,860 --> 00:15:04,860 filter our elements William IP into X I feel like into this format. 145 00:15:04,870 --> 00:15:11,540 So if we diverting junk then we need to instantiate that interface. 146 00:15:11,540 --> 00:15:17,750 But if we want to divert a spot on that spot and say we're not available in Barbados or Spartan means 147 00:15:17,780 --> 00:15:25,120 spot on 3 to 6 are not available in right so we need to basically set up already right to junk. 148 00:15:25,230 --> 00:15:32,100 I might have said we're going to see your father more digits in lap so upcoming video and after we said 149 00:15:32,150 --> 00:15:36,940 of these tired interview so we're gonna go to develop model for edgy recorded generation. 150 00:15:36,960 --> 00:15:44,620 So there is global setting so we can compete a bit again this C.D. diesel so it must be pasta. 151 00:15:44,730 --> 00:15:51,030 So after we can run through selected tax so if we don't select a target it will compare to the overall 152 00:15:51,180 --> 00:15:54,340 different to and participate as your quarters and reason. 153 00:15:54,450 --> 00:16:00,330 So we're gonna go to what is and isn't exponent and we can set the basic options and we can set of the 154 00:16:00,330 --> 00:16:03,810 language of which language we need to export did we. 155 00:16:03,840 --> 00:16:10,860 So we can export our design or we can export our IP in be ideal format or barely comment so we can set 156 00:16:10,860 --> 00:16:18,990 up this and then we can place the name on a power IP means that IP name and IP port so that it will 157 00:16:18,990 --> 00:16:29,550 be representing our book set and then we can just click on it and we can run the duck. 158 00:16:29,550 --> 00:16:35,340 So there it is to be what IP is employed actually after we complete our processing. 159 00:16:35,690 --> 00:16:39,400 Similarly then we need to go to IP is what we do in order. 160 00:16:39,430 --> 00:16:41,470 Then we can only package that IP actually. 161 00:16:41,590 --> 00:16:44,620 This process actually exists in the corresponding year deal only. 162 00:16:44,620 --> 00:16:49,920 So we need to go to IP package it and we can get out of our custom IP and we can utilize that being 163 00:16:50,140 --> 00:16:59,000 IP repository of photo so we can go to now be viable and again for a new project and you can place a 164 00:16:59,000 --> 00:17:07,160 name of like elements by getting or anyone and we can click on our project and we can click on do not 165 00:17:07,210 --> 00:17:14,850 subsidize what is so we can select board actually any city we have target platform so this default part 166 00:17:14,850 --> 00:17:23,380 selects and we have two Silicon jabber and we can see the project window here so we can go to Tools 167 00:17:23,440 --> 00:17:30,020 and get back as IP then we can go to select day off some to package our issues our data and click. 168 00:17:30,040 --> 00:17:37,620 And against setting the location of that Matlab willing project that is elements people will be 1 0 169 00:17:37,660 --> 00:17:47,810 0 location then we can go to it and back as IP and set up the location and we can just click on Next. 170 00:17:47,830 --> 00:17:53,650 And again this is start packaging up some that is finished and we'll get these tip offs and we can play 171 00:17:53,650 --> 00:17:58,890 some names there and we can see sort of some interface there and we can even edit some interface parts 172 00:17:58,930 --> 00:18:05,240 of interface and we can set up some IP addresses actually we need to see a change the address is actually 173 00:18:05,240 --> 00:18:12,520 get is default at 6 am in the audience so we need to change it to Belle of target to so then we can 174 00:18:13,630 --> 00:18:19,930 see a summary and we can click on back as IP so after that we are going to import our elements IP core 175 00:18:20,980 --> 00:18:24,370 elements people be 1 0 in me what I do. 176 00:18:24,370 --> 00:18:31,890 So actually this project generates the IP that is intellectual property e.g. building block of elements 177 00:18:31,910 --> 00:18:35,690 B core B1 jewel in the corresponding directly. 178 00:18:35,710 --> 00:18:43,390 So we can look at our IP to put story into that directories so we can replace our IP story on the IP 179 00:18:43,660 --> 00:18:49,780 and we are IP integrated so we can integrate that I view it with design that is doing pricing system 180 00:18:49,870 --> 00:18:55,780 or we can integrate that which Mike raise actually our IP is basically a site for light interface type 181 00:18:55,780 --> 00:19:03,370 of slave IP so we can integrate our slave I've been to slave I IP with Master Ip drink pricing system 182 00:19:03,540 --> 00:19:09,690 or make me and we are going to have Latin next Asian then we will talk about how to integrate that element 183 00:19:09,890 --> 00:19:15,800 what IP IP pricing might make next. 184 00:19:15,820 --> 00:19:23,300 Other media let's go to my top sibling and allowed last season by Anthony struggle and after that laughs 185 00:19:23,300 --> 00:19:28,440 He said we're going to have another last season for integrating our IP would be vital drink pricing 186 00:19:28,440 --> 00:19:36,150 system I be an Ip integrator so you for watching and we'll have lapses in the video.