The latest consider this situation where we have a zinc processing system and have previously added
any excitability, and we have configured it to operate at single channel rate, so we have changed
a bit steam.
We also have verified an application in and write this idea, right?
So now our regulators to modify IP, that is instead of a single general label, we want to utilize
a dual channel, right?
So we double click on in the Excite UPI IP to reconfigure it right.
And now we choose to use the slice, which is that we have on the go and configured our second child
to work with it, right?
So second, we will be performing an action automation, so this will automatically connect this boot
to the respective switch that we have right now.
Remember, in the previous case, we have a single channel and with an updated.
Block design, we have to change with this now we proceed to first trendy and still dapper, right?
So with this updated block design now we have created the fresh instance of is still dapper, right?
And once rapid generation is successful, we go ahead and proceed for generation of this new hardware
design.
Right?
So we proceed with the generation of Bitstream for this new hardware design.
Now will wait till the extreme generation is successful, and then we'll try to update this specification.
OK, and then why you decide?