1 00:00:00,060 --> 00:00:04,770 So a little strike, consider what are the necessary steps that you need to take whenever you plan to 2 00:00:04,890 --> 00:00:06,250 defeat those leadership? 3 00:00:06,270 --> 00:00:11,480 It was interesting system right now, zinc interesting system communicate the detail in the essay format, 4 00:00:11,490 --> 00:00:11,670 right? 5 00:00:11,670 --> 00:00:19,680 So we should be adding any excise group that allow us to connect the excise IP. 6 00:00:19,830 --> 00:00:21,270 We'll get to watching pricing system. 7 00:00:21,270 --> 00:00:26,670 So with the fundamental script that we've been using from the beginning, you'll be finding that we 8 00:00:26,670 --> 00:00:32,400 do not have any master code, which is and it was in processing system and that restrict us from connecting 9 00:00:32,400 --> 00:00:35,310 any slave IP to editing pricing system rates. 10 00:00:35,310 --> 00:00:41,670 So whenever you are in a situation where you want to interface the appeal, IP, silk or IP that have 11 00:00:41,670 --> 00:00:44,370 an slovic centerpiece, I can input site. 12 00:00:44,580 --> 00:00:46,350 You need to follow this, Rachel. 13 00:00:46,560 --> 00:00:51,720 Three things you need to add to this interesting system, so we'll just be double clicking on an increasing 14 00:00:51,720 --> 00:00:53,550 system to reconfigure it. 15 00:00:53,820 --> 00:00:54,120 OK. 16 00:00:54,300 --> 00:00:59,610 The first thing that we're going to add is we go to a useful configuration and in the gender gap, right? 17 00:00:59,610 --> 00:01:01,830 So you have enabled clock reset. 18 00:01:02,040 --> 00:01:09,360 So this will serve as a reset for those leave IP that you plan to interface with entering crossing system, 19 00:01:09,360 --> 00:01:09,580 right? 20 00:01:09,810 --> 00:01:14,100 The next, we need to add the must jury pool. 21 00:01:14,160 --> 00:01:14,520 Great. 22 00:01:14,730 --> 00:01:17,680 So we go to any exciting, non-secure enablement. 23 00:01:17,700 --> 00:01:22,970 OK, and here you have a provision to add GP mastery saying different servers. 24 00:01:22,980 --> 00:01:27,410 So we go in there, we enable one off mastery. 25 00:01:27,580 --> 00:01:28,320 As you busy doing. 26 00:01:28,890 --> 00:01:31,310 This is the second step that you need to follow. 27 00:01:31,420 --> 00:01:33,150 The last step is the clock's right. 28 00:01:33,150 --> 00:01:38,520 So we go to a clock configuration, we go to peel fabric lock and we enable one off the clock, right? 29 00:01:38,520 --> 00:01:39,830 So clock long zero. 30 00:01:40,080 --> 00:01:44,790 And depending on the requirement, you could work with the default frequency or you could vary. 31 00:01:44,790 --> 00:01:46,590 The frequency was the system. 32 00:01:47,400 --> 00:01:48,200 Just click OK. 33 00:01:48,630 --> 00:01:55,460 So with this modification, now we have an zero port been added a clock and every citizen sign. 34 00:01:55,470 --> 00:01:58,180 Right now we are ready to the user and easily. 35 00:01:58,540 --> 00:01:58,760 Right. 36 00:01:58,770 --> 00:02:03,350 So let's just try and add any Ixi GP IP. 37 00:02:03,360 --> 00:02:10,020 Right now, we plan to first work with an so we just reconfigure it so that it work with analytics and 38 00:02:10,050 --> 00:02:11,880 edge UPI IP to reconfigure it. 39 00:02:12,180 --> 00:02:14,490 Right now, we plan to use only a single chain. 40 00:02:14,490 --> 00:02:15,070 It will OK. 41 00:02:15,090 --> 00:02:16,500 We are allowed to use to change. 42 00:02:16,590 --> 00:02:20,340 As we progress further, we will be understanding how we use our multiple China. 43 00:02:20,610 --> 00:02:23,370 So go to our first channel and choose a default rate. 44 00:02:23,400 --> 00:02:24,870 So this will configure. 45 00:02:25,020 --> 00:02:29,370 I say GPI worker only then integrates with this modification. 46 00:02:29,640 --> 00:02:33,390 We just perform a collection automation and then click OK, right? 47 00:02:33,870 --> 00:02:40,170 So now if you observe we have a zero processing system and then we are automatically added and exciting 48 00:02:40,170 --> 00:02:45,920 to connect IP and that allow us to interface, I think, processing system with that GPI, right? 49 00:02:46,140 --> 00:02:53,490 This will be a step whenever we plan to interface any IP that have us live export, I can inputs. 50 00:02:53,880 --> 00:02:55,680 So we need to enable a clock reset. 51 00:02:55,920 --> 00:03:00,570 We need to enable the clock source and we need to enable anemic zero rate. 52 00:03:00,990 --> 00:03:03,970 With this now we are ready to perform validation of this. 53 00:03:04,260 --> 00:03:10,620 So once validation is successful, we go to a small step and then we create an external wrapper out 54 00:03:10,620 --> 00:03:12,960 of our block to see the ones area is ready. 55 00:03:12,990 --> 00:03:17,700 Now you can observe that our design consists of one, two and three, right? 56 00:03:17,940 --> 00:03:20,460 So we have a three pools which are present in our design. 57 00:03:20,490 --> 00:03:26,190 Now from our past experience, we know that the EDR and fixed I already have their respective work and 58 00:03:26,190 --> 00:03:31,740 it should, right, so we do not need to do or we do not need to specify any hardware pin for this to 59 00:03:32,090 --> 00:03:32,380 OK. 60 00:03:32,880 --> 00:03:36,360 Only extra thing that we have in a block design is an LCD. 61 00:03:36,510 --> 00:03:36,810 Great. 62 00:03:37,020 --> 00:03:39,860 So the simplest things you about that right? 63 00:03:39,870 --> 00:03:44,550 And there you look for the proof that you have utilizing a block design, right? 64 00:03:44,560 --> 00:03:46,290 So here we are utilizing an LLC. 65 00:03:46,500 --> 00:03:49,080 So here we do have an LCD, right? 66 00:03:49,320 --> 00:03:56,550 So if you find out the mark next to the proof of that basically mean we vital automatically recognize 67 00:03:56,550 --> 00:04:01,530 the high points for that specific paper like we do not need to specify a construct, right? 68 00:04:01,890 --> 00:04:05,100 So here you could see we do have any foreign entity. 69 00:04:05,340 --> 00:04:08,580 OK, so this signifies that this already have an heidrick connection. 70 00:04:08,610 --> 00:04:08,940 OK. 71 00:04:09,240 --> 00:04:10,770 And just to confirm, right? 72 00:04:10,770 --> 00:04:16,440 So in a case, if you do not find a very peripheral over here, the good idea will be that as you complete 73 00:04:16,440 --> 00:04:19,990 your generation of image wrapper, proceed for a synthesis. 74 00:04:20,460 --> 00:04:26,280 So synthesis will have a new planning view, which will reflect all the ports which are present in your 75 00:04:26,280 --> 00:04:26,730 design. 76 00:04:26,940 --> 00:04:31,170 And that will also tell us the status of and high recognition. 77 00:04:31,170 --> 00:04:36,210 So whether the foods that are present in our design do have the respect to high connection. 78 00:04:36,600 --> 00:04:41,700 So if we do have an hardware connection, we could proceed for some additional bitstream. 79 00:04:42,120 --> 00:04:47,670 If we do not have an outside of it, then street, then we can identify developing where we want to 80 00:04:47,670 --> 00:04:49,200 connect that specific right. 81 00:04:49,440 --> 00:04:55,440 So will we add synthesis, get completed and then we try to understand how we recognize whether we would 82 00:04:55,440 --> 00:04:57,120 have to hide the connection? 83 00:04:57,630 --> 00:04:59,300 So remember if you add up? 84 00:04:59,820 --> 00:05:05,430 Which do not have an Hardwicke connection, so you won't be allowed to proceed for an implementation 85 00:05:05,670 --> 00:05:06,960 so of in implementation. 86 00:05:07,200 --> 00:05:14,130 All the food that I present in our design must have the hardware connection or hardware been specified 87 00:05:14,130 --> 00:05:14,910 for that right. 88 00:05:15,540 --> 00:05:17,770 So our synthesis is completed successfully. 89 00:05:17,850 --> 00:05:21,300 We will choose open synthesis design and click OK, right? 90 00:05:21,300 --> 00:05:23,790 So this will automatically open up a new plan view. 91 00:05:24,660 --> 00:05:28,550 So here you could see the list off of foods which are present in the artisan read say. 92 00:05:28,560 --> 00:05:35,970 If you do not able to observe this food good, just go to the out and there you can choose and you planning, 93 00:05:36,050 --> 00:05:36,360 right? 94 00:05:36,360 --> 00:05:40,080 So this will automatically reflect all the foods which are present in our design. 95 00:05:40,290 --> 00:05:47,160 And if you observe the fit step, right, so here we are already there we have a checkmark that basically 96 00:05:47,160 --> 00:05:53,900 mean all the bins which are present in this food are already been corrected to the respect to everything. 97 00:05:53,900 --> 00:05:59,340 And if you just click on this arrow, you would actually see the package been been already been mentioned 98 00:05:59,340 --> 00:06:02,400 for all the bins, which spreads any unity, right? 99 00:06:02,400 --> 00:06:07,620 So whenever all the pins are connected to their respective high ribbon, you get this check. 100 00:06:07,830 --> 00:06:12,510 Similarly, if you observe food style, you would also have a checkmark if you just click on an arrow, 101 00:06:12,750 --> 00:06:16,560 OK, you could actually see all of them have a package been mentioned. 102 00:06:17,130 --> 00:06:24,360 Similarly, if you go to the elite, that right, so here also, you could find out that we already 103 00:06:24,360 --> 00:06:28,860 have and I respect you high rep and then specify for that, right? 104 00:06:29,100 --> 00:06:34,920 So this is the easiest way whenever you feel that you do not know whether the peripheral is connected 105 00:06:34,920 --> 00:06:38,790 to the respect to hydroplane or not, you can just go ahead and perform a synthesis. 106 00:06:39,120 --> 00:06:45,270 Go to an eye opening view and verify that all the polls have the fixed tab being checked. 107 00:06:45,510 --> 00:06:46,330 So what does this do? 108 00:06:46,440 --> 00:06:49,890 All the hydroplane are connected to the respective. 109 00:06:50,410 --> 00:06:53,430 So there are, see, four generation off of bitstream.