1 00:00:00,060 --> 00:00:05,260 So once you are extreme, generation is complete, you know, again, this will take of the top rate, 2 00:00:05,280 --> 00:00:11,640 so allow this process to complete because we are performing synthesis, implementation and imitation 3 00:00:11,640 --> 00:00:12,390 of a good swim. 4 00:00:12,550 --> 00:00:13,650 OK, in a single step. 5 00:00:13,690 --> 00:00:16,110 So this would be a finite amount of paint. 6 00:00:16,470 --> 00:00:20,490 And once this is completed, we just need to close this window, right? 7 00:00:20,730 --> 00:00:29,160 Then we will not be programming our refugees on what we are doing because we will not be utilizing AI 8 00:00:29,160 --> 00:00:36,090 naively right now in our school whenever we are in situations where you want to arm and I lean to design. 9 00:00:36,120 --> 00:00:41,350 There probably you have a situation where you will be programming your FPGA from all. 10 00:00:41,940 --> 00:00:48,040 The rest of the chips will just be performing the programming of an FPGA from a sticky old. 11 00:00:48,210 --> 00:00:48,540 Right. 12 00:00:48,870 --> 00:00:49,580 So go ahead. 13 00:00:49,590 --> 00:00:50,220 Do a fight. 14 00:00:50,940 --> 00:00:52,120 You have an expert. 15 00:00:52,140 --> 00:00:56,250 This is the first step that you'll be performing after you compete days off of it. 16 00:00:56,580 --> 00:01:01,050 So explore tired of it and do not forget to include the right. 17 00:01:01,410 --> 00:01:02,860 You just include a bitstream. 18 00:01:02,910 --> 00:01:03,420 Click OK. 19 00:01:03,930 --> 00:01:05,400 Then again, go to a fight. 20 00:01:05,400 --> 00:01:08,210 I know you could click on launches sticky. 21 00:01:08,530 --> 00:01:13,340 OK, set the default option, OK, and then click OK. 22 00:01:13,950 --> 00:01:16,470 So this will automatically launch and it's sticky. 23 00:01:16,770 --> 00:01:23,310 OK, where we will be writing our application and then verifying whether it is working on to an FPGA. 24 00:01:24,240 --> 00:01:27,750 Now, remember, we have an armed subject, right? 25 00:01:28,050 --> 00:01:32,850 So when we complete development of a sequel, the first thing that we'll be doing is to program and 26 00:01:32,850 --> 00:01:36,030 execute you and then we are allowed to execute. 27 00:01:36,930 --> 00:01:39,110 The secret to Argosy, right? 28 00:01:39,510 --> 00:01:44,220 So once you are inside and is digging, you'll be finding a series of fight, which we'll be discussing 29 00:01:44,220 --> 00:01:44,820 later on. 30 00:01:45,150 --> 00:01:51,570 So without worrying much about a file, go to fight, then click on new and the new application project 31 00:01:51,690 --> 00:01:52,470 will be created. 32 00:01:52,980 --> 00:01:58,740 So this will be the first project that will be checking the gene in configuration is successful or not. 33 00:01:58,740 --> 00:02:04,590 So we'll just be naming this ad sync configuration will be selecting the language type, do we see and 34 00:02:04,590 --> 00:02:10,640 the board support package will be created based on NEBE that is in conflict base, right? 35 00:02:10,650 --> 00:02:11,520 So click next. 36 00:02:11,520 --> 00:02:15,660 Do not click finish because we want to select the correct template, just click next. 37 00:02:15,930 --> 00:02:18,900 And the template that will be utilizing is an Halloway template. 38 00:02:19,200 --> 00:02:22,080 So selecting Halol and click finish. 39 00:02:22,530 --> 00:02:29,460 Now this will add a template where we could start working immediately with and you are ready for it. 40 00:02:29,580 --> 00:02:29,770 Right? 41 00:02:29,790 --> 00:02:35,610 So if you just explode the thing config folder that is denied, you have a small step. 42 00:02:35,850 --> 00:02:39,670 Just go to a two step and then you have an halloway right here. 43 00:02:40,140 --> 00:02:46,080 We'll just be modifying the Halloway with the same configuration is successful, and the function that 44 00:02:46,080 --> 00:02:50,580 we'll be utilizing is still retain a right. 45 00:02:50,590 --> 00:02:54,210 So this is the most efficient way to interact with your serial console. 46 00:02:54,510 --> 00:02:56,340 Consuming a lesser amount of memory. 47 00:02:56,340 --> 00:03:04,170 So we'll proceed with the ZIL printer and the string that will be adding is seeing the routine. 48 00:03:05,430 --> 00:03:08,990 Configuration is successful. 49 00:03:09,570 --> 00:03:12,090 This is the message that will be sending, right. 50 00:03:13,390 --> 00:03:18,540 Now we want to execute this application, so just click on controls, so this will automatically be 51 00:03:19,060 --> 00:03:19,780 through, right? 52 00:03:19,780 --> 00:03:25,090 So if you analyze the console, once you click on controls, the program will be automatically checked 53 00:03:25,090 --> 00:03:28,480 for any syntax error and then we will be building the program. 54 00:03:28,510 --> 00:03:32,220 Right now, we haven't put Grandma FPGA yet, right? 55 00:03:32,230 --> 00:03:35,740 So we go to this option where you see program FPGA. 56 00:03:35,770 --> 00:03:42,070 So just click on that option that will automatically download a big file onto an FPGA since we already 57 00:03:42,110 --> 00:03:43,150 exploded a big fight. 58 00:03:43,330 --> 00:03:48,250 So the same file which we generated in a wheelbarrow will be downloaded on an next. 59 00:03:48,580 --> 00:03:55,720 So once you complete this process, you have it done on your FPGA that should light up once you complete 60 00:03:55,720 --> 00:03:56,350 the program. 61 00:03:56,360 --> 00:04:01,930 Right now, here or so, you get the message that FPGA configure successfully with the bitstream. 62 00:04:02,260 --> 00:04:08,340 That's the next step is to connect an SDK terminal because they will be interacting with the message. 63 00:04:08,350 --> 00:04:13,390 Now you could have an external serial terminal, such as would be there. 64 00:04:13,390 --> 00:04:20,500 You could connect to a specific port and then you could analyze the message that we are sending, right. 65 00:04:20,500 --> 00:04:25,970 But here we do have a provision to do that is to give it that it's to get dominant. 66 00:04:25,990 --> 00:04:30,760 So we need to just connect are both over here to click on this plus S.. 67 00:04:30,760 --> 00:04:38,350 We already know that we have connected FPGA board on the console and that will be recognized by default. 68 00:04:38,380 --> 00:04:40,480 You just need to select for and click OK. 69 00:04:40,840 --> 00:04:47,740 So if everything is fine, you able to see this message connected to the computer and you are working 70 00:04:47,740 --> 00:04:49,660 at a rate of one one five two zero. 71 00:04:49,660 --> 00:04:55,750 And this is exactly the same rate which we get by default on its debt to verify that you can just go 72 00:04:55,750 --> 00:04:58,810 to the blog to say click on. 73 00:04:59,840 --> 00:05:05,180 The bailout isn't going to be a spill configuration, and then we have a gentle tap, and here you could 74 00:05:05,180 --> 00:05:10,010 see that the body that we have is one one five two seat right for. 75 00:05:10,400 --> 00:05:14,240 We have you are zero also one one five two zero. 76 00:05:15,020 --> 00:05:15,710 You like one. 77 00:05:15,710 --> 00:05:22,340 Also, we have one one five two zero right now will go ahead and we will try to execute the right. 78 00:05:22,340 --> 00:05:24,590 So to execute the goal, the process is very simple. 79 00:05:24,920 --> 00:05:27,980 Just select the folder where you have your mean fight. 80 00:05:27,980 --> 00:05:31,430 Right click right nice and then you have a launch. 81 00:05:31,940 --> 00:05:33,380 So just click on that option. 82 00:05:33,920 --> 00:05:39,200 And if everything goes fine, you're able to see sync to chain configuration is successful. 83 00:05:39,640 --> 00:05:43,400 So this is an entire process that we'll be following, right? 84 00:05:43,400 --> 00:05:48,710 From creating a blog design, generating a programming file, creating a see application, downloading 85 00:05:48,710 --> 00:05:51,590 a programming file on it and then finally running an.