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So before we proceed to understand how we access the data from a beta.

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OK, so let me just try to discuss some of the phenomena related to memory that help us to understand

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what we mean when we see byte addressable memory.

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So when we consider the memory there is, do we have a memory like this, right?

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So we have a multiple locations where we could see see the diary, for example, if memory is of SAYISI,

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but right and it have unique 64 locations, unique 64 location basically mean we have a 64 addresses

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where we could to it, right?

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So we can see that our memory looks something like this, right?

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So we have.

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So capacity to store it.

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OK.

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With each location and each location will have a unique address.

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So we have 60 votes each location, so our address will be from zero to 60.

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Right.

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And each address will store it right.

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This makes sense.

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Now, when we consider the memory, so this is referred to as a rate.

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So each data, the unique data that you give stool at a specific location, OK in a memory is referred

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to as a set, right?

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So if you have a set of size and then depending on the.

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Address space.

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OK, so we have that many locations that are available very close to the right, and this defines the

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size of a memory.

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So this we often refer to as 64 seat bit of memory.

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Right now, memory could be categorized into two different these souki in the way we access Azita,

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so it could either be the white addressable memory.

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OK.

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And the second one is the word addressable memory.

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So these are the two ways by which we access the data from a memory.

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Right?

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So when we continue to bite in this economy, the simple fact you know about this is when we see byte.

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So this signifies that each bite rate, each bite will have.

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Unique address.

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Right.

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Similarly, if you work on the seam line, so would addressable basically mean each word?

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We'll have.

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Unique address right now, what we really mean.

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So the definition of work depends primarily on the architecture that you are referring to, for example,

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world may have completely different meaning if you consider 16 bit prosit as compared to 32 bit processor,

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right?

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So that is a do you have a 64 bit processor, right?

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So in that processor, OK, or in that CPU, we could see that the word size?

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OK, world sizes 16.

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But in that case, also bite size will remain seem to bite size will always need independent off with

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architecture that we are utilizing.

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So this we already know.

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So it is referred to as invite.

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So that won't be changing between CPU architecture, but something that changes the world.

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So if you have 16 bit CPU, world size will be 16.

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If you have 32 bit CPU, OK, then in that case, world size OK will be 32 bit right.

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Similarly, if you have a 64 bit CPU, OK, in that case, the world size world size will be 64.

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Right?

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And this world size represent the single leader transaction.

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So remember this thing, depending on the CPU architecture that you are utilizing, were size me.

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OK?

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So far, use of 16 bit it will be 16 again for use of 32 bit CPU.

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It will be thirty nine.

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This represent the single data transaction for that specific kind of a.

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Right.

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So when we consider lyricism, byte addressable memory rates, we know each byte will have a unique

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address rate.

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So if we just wish to draw the memory for this game?

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Right.

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So in that case, there is a do.

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We have a multiple unique sense, right?

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So each cell will have a unique address.

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So here now if you consider a byte addressable memory, so let's assume you have a 64 unique location

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where we could store it.

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Bit of right to each cell in this kind of memory is capable of storing it right.

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So such kind of memory is referred to as divided residual memory.

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Right.

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When we consider the word addressable memory, let us assume again we have a 60 for unique location,

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right?

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So here we will be having an address ranging from zero to sixty three and each address now or each cell

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is capable of storing it right.

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So here we have a word zero.

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Word one.

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And then word six to three right now, word size will be varying depending on the CPU architecture that

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you are targeting, Rachel.

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This is what we refer to as the.

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World oriented memory or word addressable memory.

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So this is the primary difference that we have between.

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The byte addressable memory and the word addressable memory, right, so you could really understand

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now that when we consider the byte addressable memory, right?

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So in that GIS, each byte, it would basically represent a single byte.

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So each byte have a unique address.

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And when we consider world addressable right to each word, have a unique address right now when we

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consider our microplates.

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So when we consider now micro, please, so micro please is having a 32 bit of it, right?

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So it is basically having a word size of 32 bit, right?

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Similarly, the transaction is of, say, 32 bit.

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But the type of memory that my group is utilized is the byte addressable memory.

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OK.

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And this basically be a bit of confusion because.

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So, ladies, do we want to perform a single detransition lecture here addressing the memory is a bit

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confusing, right?

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So let us do we have words, the right words?

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It'll have an address of CO2, right?

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We already know that our memories and our detour sizes of 32 bit, right?

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So you have our first bite look at at this second bite.

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Look, we delivered this one third bite.

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Look into this too and would bite.

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Look at it, an address for the right.

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So we at news request for addresses to correctly stool single data transaction, record single data

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into a memory.

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So this ultimately suggests that when we want to access the next word.

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Right?

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So the address should be automatically secured by food.

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Right.

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Because our next data would only be stored at an address of food.

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Right.

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Similarly, this is also why do we need to go to seven to store?

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All right.

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So when we consider micro, please.

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OK, so if you can see the memory and if you want to access the memory.

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So this is the memory that we have for our listeners who might replace this.

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So we have some unique locations from zero x and each word.

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When we consider the decision, this is what zero.

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So the next location or the next word will be automatically located at Dressel because we have a buy

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to the Indian memory.

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So to store a single 32 bit data, be required for addresses.

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So the next address or the next D next word will be automatically stored.

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We buy food location, right?

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Similarly, if you want to access the next it, it will be automatically operated by four, right?

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So if you consider it with the first word, so it will be having an accurate selfie.

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And if you consider this the word one, it will be operated by four.

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Right.

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So this is how we will be addressing Adidas.
