1 00:00:00,540 --> 00:00:01,340 Hello fellas. 2 00:00:01,380 --> 00:00:02,760 Welcome back. 3 00:00:02,760 --> 00:00:08,550 In the previous section we talked about embedded systems used in the process or in this lesson we shall 4 00:00:08,550 --> 00:00:12,780 look at how data moves between different parts of the process of core. 5 00:00:12,980 --> 00:00:19,410 You had a program I can think of the ARM core as a functional unit connected by data process where the 6 00:00:19,530 --> 00:00:22,470 arrows represent the flow of data. 7 00:00:22,470 --> 00:00:30,030 The lines here represent the boxes and the boxes represent either an operation unit or a storage area. 8 00:00:30,030 --> 00:00:36,990 From this diagram we can see not only data but also the abstract components that make up the ARM core 9 00:00:37,680 --> 00:00:44,280 data enters the core through the data bus the data bus may be on instruction to execute or add data 10 00:00:44,370 --> 00:00:45,590 item. 11 00:00:45,630 --> 00:00:51,870 This arrangement here shows a Von Neumann implementation of the arm process or as we can see data and 12 00:00:51,870 --> 00:00:58,760 instructions share the same bus destruction decoder translate instruction before they're executed it's 13 00:00:58,770 --> 00:01:05,640 instruction executed belongs to a particular instruction set since process source use risk architecture 14 00:01:05,970 --> 00:01:07,080 and a feature of risk. 15 00:01:07,170 --> 00:01:10,110 Architecture is the lodestar architecture. 16 00:01:10,230 --> 00:01:17,090 This means it has two instruction types for transferring data in and out of the process so load instructions 17 00:01:17,090 --> 00:01:23,710 copy data from memory to registers and store instruction copy data from registers to memory. 18 00:01:23,730 --> 00:01:31,080 There are no data processing instructions that directly manipulate data in memory meaning data is solely 19 00:01:31,080 --> 00:01:37,530 processed in the registers data items are placed in the register file and as we mentioned the registers 20 00:01:37,620 --> 00:01:45,340 are like 32 bit fast accessible storage as soon as the Army Corps is 32 bit process so most instructions 21 00:01:45,360 --> 00:01:51,620 treats the registers as hold in a signed or unsigned 32 bits value design. 22 00:01:51,750 --> 00:01:58,650 Extend hardware over here convert age between 16 bits numbers to 32 bits numbers as they are read from 23 00:01:58,650 --> 00:02:01,160 memory and placed in a register. 24 00:02:01,420 --> 00:02:09,450 Instructions typically have 2 source registers are in an hour and a single result or destination register 25 00:02:09,590 --> 00:02:18,510 our deep source operations are read from the register file using these internal buses a and b the arithmetic 26 00:02:18,570 --> 00:02:26,760 logic unit known as a queue for short or the multiply accumulates unit known as the Mac takes their 27 00:02:26,760 --> 00:02:35,610 register values R and R M from 8 and b buses and compute a resource to data processing instructions 28 00:02:35,730 --> 00:02:42,930 right resort in R D directly to the register file load and store instructions use the ACLU to generate 29 00:02:42,990 --> 00:02:49,380 an address to be held in the address register and broadcast on the address box. 30 00:02:49,380 --> 00:02:56,340 One other important feature of the process or is that register R and can alternatively be processed 31 00:02:56,400 --> 00:03:01,010 in the Barrow shift before it enters the ACLU together. 32 00:03:01,030 --> 00:03:08,430 The Barrow shifter and the ACLU can calculate a wide range of expressions and addresses after passing 33 00:03:08,430 --> 00:03:10,050 through the functional unit. 34 00:03:10,050 --> 00:03:17,070 The result in R D is written back to the register file using the resort bus for load and store instructions. 35 00:03:17,070 --> 00:03:24,150 The incremental updates the address register before the call reads or writes the next register value 36 00:03:24,450 --> 00:03:28,250 from or to the next sequential memory location. 37 00:03:28,320 --> 00:03:33,660 The process of continuous execute and instructions until an exception or an interrupt. 38 00:03:33,670 --> 00:03:36,530 Changes the normal execution flow. 39 00:03:36,530 --> 00:03:38,620 So this is all there is to it. 40 00:03:38,640 --> 00:03:44,240 Remember to leave your questions below or send me a message and I shall see you in the next lesson.