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Hello.

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Welcome back.

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The cortex infected table is considerably different from the arms of TDM effector table.

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Yeah we can see the various exception types and their own exception numbers and addresses in memory.

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An important point is that the LSP bit of the LSP is the least significant bit should be always said

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to one.

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Although if you're coding and see language the compiler will take care of this for you.

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When we start looking at the instruction set in future sections we will discover that the cortex process

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or executes the thumb to instruction set RIGHT ON THE ARM instruction set.

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Executed it by the 17 year by the cortex M. Haas about 10 exceptions.

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Each exception has its own exception number it's got its address in memory.

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So these are the exceptions listed.

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And don't worry if you don't understand them here.

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Yes just to give you an introduction of the exceptions available on the cortex in process or when we

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start coding and applying them to our code we'll elaborate on them further.

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So this is all there is to it and I will see you in the next lesson.