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Hello fellas.

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Welcome back.

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In this lesson we shall look at the southern TDM my vector table.

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The exception of vector table consist of designated addresses an external memory that hold information

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necessary to handle an exception an interrupt or other unusual event such as a reset.

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You know a good example is what the process does when an interrupt occurs it changes the program counter

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to something like 0 x 1 8 and begins fetching instructions from there.

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The data addresses that are located at these addresses are actual instructions which we shall take a

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look at the next instruction the machine is likely to fetch is the branch instruction.

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Assuming you the programmer puts such an instruction address you x 1 8.

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Once this branch instruction is executed the process will begin fetching instructions for the interrupt

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handler held in the target's address.

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The recent exception factor is that memory address 0 0 0 0 0 0.

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The system will fetch from this address immediately as it comes out of reset.

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We can provide a reset exception handler or we can simply begin our code from here as we shall see later.

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I will call you vision which is the the two chain an idea we're going to be using generators startup

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reset handler for us.

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Dead exception is jumped to various posts on most listed and d the addresses of the various modes listed

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with the mode so there is that exception operates in the SBC mode.

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The undefined instruction exception operates in the undefined mode the IRR Q interrupts the normal interrupt.

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Exception operates in the interrupt mode.

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The abort the data abort exception operates in the sports mode.

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So when any of these exceptions or care dies the process I jump straight to the respective addresses.

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Don't worry my view if you don't understand what exceptions or interrupt are we going to write code

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to demonstrate and use them.

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So yeah this is this is this an overview of the 70 TDM factor table and I shall see you in the next

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lesson as we take a look at the core text M family.