1 00:00:00,810 --> 00:00:01,650 Hello fellas. 2 00:00:01,650 --> 00:00:02,250 Welcome back. 3 00:00:02,250 --> 00:00:08,370 As I mentioned earlier armies made of different process of families and there are some variations in 4 00:00:08,370 --> 00:00:10,990 the architecture among the processors. 5 00:00:11,310 --> 00:00:16,290 So for this cause I'm given a very generic overview of the ARM architecture. 6 00:00:16,290 --> 00:00:25,140 But as we proceed the examples provided shall be focused on two specific processors the cortex and the 7 00:00:25,380 --> 00:00:27,950 seven TDM II processors. 8 00:00:27,960 --> 00:00:35,010 However the beauty of lending arm assembly is that once you know how to program in assembly for a particular 9 00:00:35,010 --> 00:00:40,250 arm board should be able to write code on other boards. 10 00:00:40,260 --> 00:00:48,720 In fact the Assembly we show right here should run on all boards except in situations where a particular 11 00:00:48,720 --> 00:00:52,010 board can execute just the thumb instruction set. 12 00:00:52,350 --> 00:00:55,740 In our code it's using just the ARM instruction set. 13 00:00:56,400 --> 00:01:03,990 So the key thing here is to understand the instruction set architecture used by armies should be able 14 00:01:03,990 --> 00:01:07,750 to write assembly code for any army based board right. 15 00:01:07,920 --> 00:01:08,460 Moving on. 16 00:01:09,450 --> 00:01:13,450 Let's take a look at the process on modes of the 70 BMI. 17 00:01:13,620 --> 00:01:16,220 For those of you who don't know the 70 they're my. 18 00:01:16,230 --> 00:01:17,490 Don't worry. 19 00:01:18,490 --> 00:01:24,600 At the end of this section we shall give a list of the entire process of family and you know explain 20 00:01:24,600 --> 00:01:33,750 the differences amongst the 70 BMI is just a member of the family older version of the 70 BMI version 21 00:01:33,750 --> 00:01:42,090 14 course supports seven process or most of these are they use a mode the system mode the on defined 22 00:01:42,090 --> 00:01:50,100 mode the airport mode to normal INTERRUPT REQUEST mode the fast INTERRUPT REQUEST mode and the supervisor 23 00:01:50,100 --> 00:01:51,350 mode. 24 00:01:51,340 --> 00:01:59,670 It's possible to make most changes under software control but most are normally caused by external conditions 25 00:01:59,670 --> 00:02:01,140 like exceptions. 26 00:02:01,170 --> 00:02:08,630 Most application programs will execute and use a mode the other modes so no nasty privileged mode. 27 00:02:08,700 --> 00:02:15,450 While the use of mode is the unprivileged mode and the privilege modes are a way to serve as exceptions 28 00:02:15,810 --> 00:02:24,320 or access protected resources such as bits that disable sections of the call like a branch predictor 29 00:02:24,420 --> 00:02:26,270 or cache memory. 30 00:02:26,280 --> 00:02:33,870 One other way of looking at this is too few and mode as an indication of what the process is actually 31 00:02:33,870 --> 00:02:41,210 doing in normal circumstances the system will be either in use some mode or supervisor mode. 32 00:02:41,380 --> 00:02:47,510 Consider a device like a cell phone where not much happens until either a signal comes in. 33 00:02:47,830 --> 00:02:55,740 While the user has pressed their key onto such a time the processor probably has powered itself down 34 00:02:55,770 --> 00:03:01,920 and it's using less power and it's it's probably waiting for an event to occur before it wakes up to 35 00:03:01,920 --> 00:03:02,920 use more power. 36 00:03:02,940 --> 00:03:10,290 These external events could be seen as interrupt typically processors have different number of interrupt 37 00:03:10,900 --> 00:03:19,090 but the arm TDM has two types the fast interrupt and the lower priority interrupt no nasty known as 38 00:03:19,160 --> 00:03:27,660 the normal interrupt you can think of fast interrupt us one that might be used to indicate the system 39 00:03:27,660 --> 00:03:33,930 is about to lose power in a few milliseconds and the normal interrupt one that would be used to indicate 40 00:03:35,640 --> 00:03:42,170 the peripheral needs to be serviced or the screen has been touched or the mouse has been moved etc. 41 00:03:42,210 --> 00:03:49,350 Things like that the abort mode simply allow us to process or to recover from exceptional conditions 42 00:03:49,770 --> 00:03:54,600 such as a memory access to one address that doesn't exist physically. 43 00:03:54,600 --> 00:04:01,650 This mode can also be used to support virtual memory systems also required for operating systems like 44 00:04:01,710 --> 00:04:08,170 Linux process or was switched to the undefined mode when it sees on instruction in the pipeline that 45 00:04:08,320 --> 00:04:16,230 it does not recognize it is the responsibility of We the programmers to arm to determine how the machine 46 00:04:16,230 --> 00:04:20,310 should recover from such an error ask for a supervisor mode. 47 00:04:20,310 --> 00:04:27,240 We've got dedicated sections just to talk about it and the relation it's got with the interrupt and 48 00:04:27,240 --> 00:04:28,790 exceptions. 49 00:04:28,800 --> 00:04:36,400 Now let's take a look at the process on most of the cortex and I'm not a member of the process or family. 50 00:04:36,450 --> 00:04:39,070 The cortex M4 has only two modes. 51 00:04:39,080 --> 00:04:45,080 The the handler mode and the threat mode and there are two access levels to go along with these modes 52 00:04:45,470 --> 00:04:50,880 the privileged access level and the user access level depending on what the system is doing for very 53 00:04:50,880 --> 00:04:56,700 simple applications to purchase on me only stay in a single access level whereas in situations where 54 00:04:56,700 --> 00:05:03,250 you have an embedded operating system control in every security may play a role by partition into kennels 55 00:05:03,300 --> 00:05:07,970 stacked memory from the user stacked memory to avoid problems. 56 00:05:07,970 --> 00:05:15,170 And again we shall leave the discussions on exception handling to the sections on exception interrupting 57 00:05:15,740 --> 00:05:18,590 other supervisor applications. 58 00:05:18,590 --> 00:05:22,730 So this is all there is to it and I'll see you in the next lesson.