1 00:00:00,890 --> 00:00:01,860 Hello fellas. 2 00:00:01,880 --> 00:00:03,030 Welcome back. 3 00:00:03,050 --> 00:00:08,900 In these next three lessons we shall look at some of the core extensions that can be placed next to 4 00:00:08,900 --> 00:00:10,070 the core. 5 00:00:10,160 --> 00:00:17,720 These extensions improve performance manage resources and provide extra functionalities and and are 6 00:00:17,720 --> 00:00:23,170 designed to provide flexibility in handling particular applications. 7 00:00:23,180 --> 00:00:27,020 Each family has different extensions available to it. 8 00:00:27,140 --> 00:00:30,990 The are hardware extension is wraps on the call. 9 00:00:31,040 --> 00:00:37,960 In this lesson we shall take a look at the very first one which is the cash and tightly coupled memory. 10 00:00:38,120 --> 00:00:45,170 As I've mentioned earlier the cash is a block of fast memory place between the core and the main memory. 11 00:00:45,230 --> 00:00:51,350 It allows for more efficient features from some memory types with a cash. 12 00:00:51,350 --> 00:00:58,310 The process of call can run for majority of the time without having to wait for data from slow external 13 00:00:58,310 --> 00:00:58,970 memory. 14 00:00:59,090 --> 00:01:08,960 Most based embedded systems use a a single level cash internal to the process or has two forms of this 15 00:01:08,960 --> 00:01:11,100 fast accessible memory. 16 00:01:11,180 --> 00:01:17,780 The first form is used with the with von Neumann architecture and this form which we are currently looking 17 00:01:17,780 --> 00:01:26,720 at combines both data and instruction into a single unified cash load and control an amber bus interface 18 00:01:26,720 --> 00:01:34,750 unit simply helps connect to the memory system to the Amber bus which connects to the main memory. 19 00:01:34,790 --> 00:01:42,560 The second reform of fast accessible memory use with the use by arm is used with the Harvard architecture 20 00:01:43,430 --> 00:01:49,130 and this form has separate fast accessible memories for data and instruction. 21 00:01:49,170 --> 00:01:57,170 And as you may recall the cash provides an overall increase in performance but at the expense of predictable 22 00:01:57,200 --> 00:02:04,070 execution real time systems are deterministic systems they require execution time to be predictable. 23 00:02:04,070 --> 00:02:11,900 This can be achieved using this second form of fast accessible memory caught the tightly coupled memory 24 00:02:12,320 --> 00:02:19,310 or the TCM to TCM is a first s room located close to the core and guarantees that clock cycles required 25 00:02:19,310 --> 00:02:27,110 to fetch instructions or data to set up here as memory and address map and can be accessed very fast. 26 00:02:27,200 --> 00:02:36,800 So in effect they work like the cash effect by using the teams and the cash processors have both extra 27 00:02:37,010 --> 00:02:41,270 performers boost their now predictable real time response. 28 00:02:41,270 --> 00:02:44,510 This is what the modified architecture looks like. 29 00:02:44,510 --> 00:02:51,620 The logic and control unit is placed between the police between the memory management unit and the core 30 00:02:51,920 --> 00:02:54,460 and the memory management units. 31 00:02:54,470 --> 00:03:02,480 I mean as the the data TCM is structured TCM data cache instruction cache the TCM and the cash are connected 32 00:03:02,480 --> 00:03:05,930 to the main memory use in the umber bus interface. 33 00:03:05,930 --> 00:03:08,300 Like the other two architectures we just look. 34 00:03:08,630 --> 00:03:10,460 We just looked at two. 35 00:03:10,610 --> 00:03:11,690 This is all there is to it. 36 00:03:12,080 --> 00:03:18,590 You don't need to understand how to draw this diagram or how to be able to decode it or anything but 37 00:03:18,650 --> 00:03:24,860 it's just an introduction to fast accessible memory and how a memory works because I'm sure you hear 38 00:03:24,860 --> 00:03:31,110 about cache memory all the time when you're reading your mobile phone specifications or just reading 39 00:03:31,130 --> 00:03:34,010 specifications dealing with better devices. 40 00:03:34,040 --> 00:03:40,840 This is how cache and tightly coupled memory works and I'll see you in the next lesson.