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Hello fellas.

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Welcome back.

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So in this lesson we're going to talk about the armed bus technology and the armor bust protocol.

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So this is our simplified ARM based embedded device from before and the buses are the blue lines as

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indicated in the diagram.

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So basically these are two classes of devices connected to the bus.

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There is the bus master and the bus leave the bus master is often a logical device capable of initiating

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data transfer with another device and the slave is capable of only responding to a transfer request

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from the master a bus has to architecture levels and the first level is known as the physical level.

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The second level is known as the protocol level.

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The physical level deals with the electric core characteristics of the bus and things like the bus with

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example 16 bits 32 bit 8 bits etc. We shall look at this stuff later.

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The bus protocol dictates the rules the the bus master and the bus leave uses to communicate.

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Now let's give a short overview of the amber bus protocol.

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The Amber stands for Advanced microcontroller bus architecture and it is the widely adopted on chip

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architecture used for process source.

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The very first Amber buses where the the arm system bus and the peripheral bus.

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Later on introduced the high performance bus using the amber protocol for designers can reuse the same

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design on multiple projects.

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The HP provides a higher throughput than the ESB and an APB because it is at this a sort of centralized

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more to place bus scheme which we sure look at later rather than a bi directional design like the ESB

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and the APB.

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And because of this HP buses are able to run at higher clock frequencies.

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So this is all there is to it and I'll see you in the next lesson.