1 00:00:00,600 --> 00:00:01,110 Hello. 2 00:00:01,140 --> 00:00:01,830 Welcome back. 3 00:00:01,920 --> 00:00:06,800 In this lesson we agreed to see how to develop the new arts driver for awhile. 4 00:00:06,840 --> 00:00:09,640 Tim 4C One two three microcontroller. 5 00:00:09,780 --> 00:00:15,800 Gonna create a new project by coming over here near you Vision project creates a new forward for this 6 00:00:15,990 --> 00:00:18,540 this you at 7 00:00:22,030 --> 00:00:31,990 then the project I'll call you out and I'm going to select my board Tim 4C 1 2 THREE 2 H 6 p.m. 8 00:00:35,370 --> 00:00:41,640 okay and then the Simpsons I'm going to select the core on the device or select this startup. 9 00:00:42,330 --> 00:00:43,970 Okay. 10 00:00:44,280 --> 00:00:45,070 This is it. 11 00:00:45,120 --> 00:00:47,680 My target is the Tim 4C 1 2 3 12 00:00:51,960 --> 00:00:53,030 the group here. 13 00:00:53,030 --> 00:00:55,610 I'm gonna rename it to AP. 14 00:00:56,010 --> 00:01:02,680 Gonna right click a new item that S and I'll give it a name main. 15 00:01:02,920 --> 00:01:11,180 So we have our main dot S4 so we going to configure the um the you peripheral on our microcontroller 16 00:01:11,370 --> 00:01:14,150 and we've got a number of U S that we can use. 17 00:01:14,160 --> 00:01:20,820 I think we have you to zero one two three and even four in this um experiment we're going to use you 18 00:01:20,820 --> 00:01:29,950 at zero the R X line you are just two lines there is you receive and transmit our X and T X so you are 19 00:01:29,950 --> 00:01:32,040 at zero I'll put a comment here 20 00:01:35,140 --> 00:01:42,500 we find the RDX at P is you remember the UT is connected to a uh no more GPL U. 21 00:01:42,640 --> 00:01:44,400 So in order to use the U. 22 00:01:44,450 --> 00:01:50,180 We need to configure the GPL u to be s p i o special purpose input output. 23 00:01:50,440 --> 00:01:56,770 And another way of saying this is we need to configure the GPL you for its own tonight function one 24 00:01:56,770 --> 00:02:03,130 of its alternate function because a single GPL European could have multiple alternate functions. 25 00:02:03,130 --> 00:02:11,370 You can have one pin that you can configure to serve as a you to been an ABC pin or even a pin. 26 00:02:11,710 --> 00:02:13,190 Right. 27 00:02:13,240 --> 00:02:23,700 So we're going to use you at zero which is connected to p a zero and P A one hour X and T X respectively 28 00:02:27,420 --> 00:02:27,920 okay. 29 00:02:28,050 --> 00:02:32,830 So we would need to configure P is European one for alternate function. 30 00:02:32,960 --> 00:02:33,410 Right. 31 00:02:34,180 --> 00:02:43,950 So um let's go to the data sheets and um and find the the addresses of the relevant registers that we 32 00:02:43,950 --> 00:02:47,000 need when I open my data sheets. 33 00:02:47,010 --> 00:02:48,210 I've got it over here. 34 00:02:48,300 --> 00:02:52,410 We started with GPL u a um 35 00:02:55,680 --> 00:02:57,480 less control F for GPL. 36 00:02:57,480 --> 00:03:01,350 You see we have GPL u here. 37 00:03:01,410 --> 00:03:08,020 I'm gonna go to um register descriptions and um I'll be brought here. 38 00:03:11,280 --> 00:03:19,990 So I'm going to get the GPL you a bass address. 39 00:03:20,140 --> 00:03:26,680 This is a closed is a Yeah. 40 00:03:26,790 --> 00:03:28,670 This is it copy it. 41 00:03:29,250 --> 00:03:29,760 And then 42 00:03:35,030 --> 00:03:43,710 when I come over here and then I'll say GPL you a on this code base. 43 00:03:43,980 --> 00:03:52,790 Q You this is the base address I just delete this from here and then what we also need is the um the 44 00:03:52,790 --> 00:03:57,150 system control base and then the system control offset. 45 00:03:57,350 --> 00:04:03,530 We already sorted that out in the previous the previous lessons so I'm just gonna bring that piece of 46 00:04:03,530 --> 00:04:06,530 code that we already wrote the assignment we did for that. 47 00:04:07,130 --> 00:04:14,630 So this is a system control base address because we need to enable clock access to GPL 8 and we would 48 00:04:14,630 --> 00:04:18,990 have to go through a system control to do the right. 49 00:04:19,160 --> 00:04:21,960 So we've got GPL you APIs. 50 00:04:22,460 --> 00:04:30,390 Now we can get our various registers we would need to configure the um we need to configure the digital 51 00:04:30,390 --> 00:04:35,650 we enable and then we may have to not May. 52 00:04:35,660 --> 00:04:41,020 We definitely have to access the alternate function register to select the alternate function. 53 00:04:41,060 --> 00:04:49,720 We also have to deal with things like disabling analogue functionality and perhaps you know yeah we 54 00:04:49,940 --> 00:04:54,330 we need not touch the content the direction register here. 55 00:04:54,530 --> 00:04:56,750 So we can leave that out. 56 00:04:56,870 --> 00:04:58,010 So I'm gonna get the. 57 00:04:58,220 --> 00:05:02,360 Or just create symbolic names for the registers that we are going to be touching. 58 00:05:02,720 --> 00:05:08,330 We're going to be accessing GPL u a GPA a 59 00:05:13,420 --> 00:05:19,000 GPA a TV end which is the D to enable register 60 00:05:24,550 --> 00:05:26,400 D and underscore our 61 00:05:30,340 --> 00:05:33,840 no offset first. 62 00:05:33,880 --> 00:05:48,130 Q You don't have that yet so we leave it and they won't do GPL u a d n the register e course Baz 63 00:05:51,130 --> 00:05:53,740 plus the offset like this. 64 00:05:55,660 --> 00:06:00,010 Okay the next one is gonna be. 65 00:06:00,010 --> 00:06:00,970 Q Are you a 66 00:06:03,730 --> 00:06:07,030 alternate function select offset 67 00:06:10,920 --> 00:06:24,480 we do not have it so I'll just leave it blank then GPL you a net function select register this equals 68 00:06:24,630 --> 00:06:25,350 the base 69 00:06:27,840 --> 00:06:30,060 plus it's offset 70 00:06:37,210 --> 00:06:47,940 Um yeah I think these are the two registers we um we need you I'm trying to have a minimalist code over 71 00:06:47,940 --> 00:06:48,920 here. 72 00:06:49,620 --> 00:06:57,300 Um okay we'll need a P C T L registered to think we need that s I don't want us to sometimes some register 73 00:06:57,310 --> 00:07:05,610 the um some of the registers have got different values the way we want them so often the best practices 74 00:07:05,620 --> 00:07:11,280 is even if they register its default value is your issue and you want that bit to be 0 you should actively 75 00:07:11,280 --> 00:07:21,640 set it to 0 but you know that to minimize the code I sometimes avoid that we need a P T O register uh 76 00:07:22,440 --> 00:07:24,180 um Oh c GPL you a 77 00:07:27,910 --> 00:07:28,780 P C 78 00:07:34,930 --> 00:07:47,340 offset first a Q you then you Yeah a peace treaty L to register 79 00:07:50,250 --> 00:07:55,650 es equals the base plus the offset 80 00:08:00,980 --> 00:08:05,040 plus the offset this one here 81 00:08:10,870 --> 00:08:11,310 right. 82 00:08:12,220 --> 00:08:16,480 We have to teach to enable you only have this. 83 00:08:16,850 --> 00:08:28,690 Okay so um a symbolic name for enabling GPL u e to enable GPL U A we need to go to the system control 84 00:08:28,690 --> 00:08:40,220 register and then we need to we need to set bits number 0 to 1 we need to go to the system control RC 85 00:08:40,240 --> 00:08:46,300 GC GPL you register this one here sets bits number 0 to 1 and we shall find in the data sheet so I'm 86 00:08:46,300 --> 00:08:56,140 gonna create a symbolic name for that I'm simply going to say GPL u a QPR U E E N E course 87 00:09:02,260 --> 00:09:13,750 shift 1 2 bits number 0 and then over here we need to enable clock access for the M for the U ut as 88 00:09:13,750 --> 00:09:22,450 well and to enable clock access for the U ut we would need to access the our C GC you ought to register 89 00:09:22,690 --> 00:09:30,630 we have the RC GC GPL you register to enable clock access for our various GPL your ports and because 90 00:09:30,670 --> 00:09:37,420 we have multiple U S we need to go to the RC GC you are registered to enable clock access for the U 91 00:09:37,610 --> 00:09:40,840 S that we want to use so I'll see you at 0 92 00:09:44,770 --> 00:09:59,170 e end and this is also passing one or two bits number zero so we need the we need the RC GC you UT register 93 00:09:59,320 --> 00:10:04,330 we need to create a symbolic name for the we need to get the address and give it a symbolic name because 94 00:10:04,330 --> 00:10:10,390 we have just RC GC RC GC GPL you here we need you UT 95 00:10:13,190 --> 00:10:22,280 so um the RCC you ought to register is simply going to be an office on offset from the system control 96 00:10:22,280 --> 00:10:22,720 base. 97 00:10:23,210 --> 00:10:28,160 So I'm gonna say the same way we have GPL here. 98 00:10:28,190 --> 00:10:36,950 I'm going to have our GC you out here so see RC GC You got offset. 99 00:10:37,490 --> 00:10:41,830 We do not have that so I'm going to leave it and then I'm going to see 100 00:10:44,860 --> 00:10:55,040 this control you know system control is often written with a T but because we are given our own names 101 00:10:55,130 --> 00:10:59,660 we can write it how we want it but we can fix this and make it look good. 102 00:10:59,710 --> 00:11:02,840 Just change the R to t here okay. 103 00:11:02,930 --> 00:11:14,630 System control so the registry court system control RC GC you art school are and this is going to be 104 00:11:15,800 --> 00:11:17,360 the system control base 105 00:11:19,910 --> 00:11:22,490 plus the offset. 106 00:11:22,510 --> 00:11:25,310 RC You see you are offset like this. 107 00:11:26,180 --> 00:11:30,060 Okay so we would have to fetch this from the data sheet as well. 108 00:11:30,560 --> 00:11:39,960 Um and then we've got the um we've got a bit shift to enable our to enable or you what. 109 00:11:40,320 --> 00:11:41,100 Right. 110 00:11:41,270 --> 00:11:42,770 You want an GPL you A. 111 00:11:43,100 --> 00:11:47,190 So now we can go to the data sheet and fetch what we want. 112 00:11:47,200 --> 00:11:47,970 All right. 113 00:11:48,170 --> 00:11:53,270 Now let's go to the data sheet and get the um the offset of the various registers. 114 00:11:53,330 --> 00:11:55,620 Let's start with the RC GC. 115 00:11:55,640 --> 00:11:57,370 I'm gonna go to my data sheet here. 116 00:11:57,380 --> 00:12:06,140 Control f 2 search and then you can simply type our CTC you out and then I'll hit enter and then it 117 00:12:06,140 --> 00:12:07,300 brings me here. 118 00:12:07,430 --> 00:12:16,330 Register sixty three RC GC you to click over here and the offset is 0 x 6 1 8 0. 119 00:12:16,340 --> 00:12:19,520 Copy this and bring it over here 120 00:12:23,160 --> 00:12:25,160 and we can read a bit about it. 121 00:12:25,230 --> 00:12:33,170 Like I said this register is used for enabling the clock access for a while various blue dots. 122 00:12:33,330 --> 00:12:38,480 Let's see what bits number 0 does etc. Over here. 123 00:12:38,520 --> 00:12:40,410 You are two more to zero run mode. 124 00:12:40,410 --> 00:12:41,760 Clock gate in control. 125 00:12:42,330 --> 00:12:44,510 If we pass 0 2 pitch 0. 126 00:12:44,580 --> 00:12:48,800 If we set the bit 0 2 0 you are two modules you is disabled. 127 00:12:48,900 --> 00:12:54,130 If we set it to 1 we enable and provide a clock to you at module 0 in run mode. 128 00:12:54,240 --> 00:13:02,360 So that is why we have this symbolic name shift 1 2 bits number 0 for you to enable. 129 00:13:02,730 --> 00:13:05,600 Okay so the next register is the GPL. 130 00:13:05,620 --> 00:13:10,150 You're a digital enable register to end. 131 00:13:10,480 --> 00:13:18,180 So I'm gonna go to GPL you gonna come up here and search GPL you and 132 00:13:21,510 --> 00:13:25,980 we just go to click click register descriptions here. 133 00:13:26,200 --> 00:13:34,420 Then as you bring us to the registers and what we need is the date the deep end to teach to enable a 134 00:13:34,440 --> 00:13:38,960 register so we can keep scrolling till we find it 135 00:13:45,400 --> 00:13:47,010 should be down here somewhere. 136 00:13:48,210 --> 00:13:48,550 Okay. 137 00:13:48,550 --> 00:13:49,240 We would need. 138 00:13:49,240 --> 00:13:52,240 We need the alternate function selector register as well. 139 00:13:52,240 --> 00:13:54,290 So how about we just copy it. 140 00:13:54,430 --> 00:13:56,060 Although we are looking for the key. 141 00:13:56,660 --> 00:14:03,800 So copying the offset of the alternate function select and put it over here. 142 00:14:04,660 --> 00:14:05,000 Right. 143 00:14:05,080 --> 00:14:05,770 Let's go back 144 00:14:11,330 --> 00:14:15,500 and where is the DC n 145 00:14:20,260 --> 00:14:20,940 k. 146 00:14:23,080 --> 00:14:25,170 See goodness. 147 00:14:25,250 --> 00:14:27,040 Okay here we go. 148 00:14:27,040 --> 00:14:30,540 GPL duty and Okay copy this. 149 00:14:34,340 --> 00:14:37,670 D n no. 150 00:14:37,930 --> 00:14:39,590 We're looking for the P.C. TTL. 151 00:14:41,740 --> 00:14:42,310 Or it. 152 00:14:42,560 --> 00:14:44,120 Let's go scroll down. 153 00:14:52,510 --> 00:14:55,190 This is the port control register. 154 00:14:55,240 --> 00:14:55,900 Copy this 155 00:14:59,870 --> 00:15:00,610 you can read. 156 00:15:00,660 --> 00:15:05,060 You can read it all these registers if you want to learn more about them. 157 00:15:05,100 --> 00:15:11,310 And if you want to read more about the U S You can read more about the US from the data sheet just like 158 00:15:11,310 --> 00:15:18,670 we saw how the the data sheet provided step by step instruction for initializing the GPL you know what 159 00:15:18,720 --> 00:15:25,440 pay a section does the same step by step instructions for you at and in fact for any peripheral that 160 00:15:25,440 --> 00:15:31,770 the m the microcontroller provides I'm scrolling up to the bits that talks about initialization so just 161 00:15:31,770 --> 00:15:35,290 bear with me so it should be under you. 162 00:15:35,460 --> 00:15:42,330 There is always a section under initialization that talks Okay so it talks about the initialization 163 00:15:42,330 --> 00:15:43,170 procedure here. 164 00:15:43,260 --> 00:15:47,550 So if you want to read more about it you can do that or not. 165 00:15:47,550 --> 00:15:48,510 This is GPL. 166 00:15:48,570 --> 00:15:54,870 But if you go to the U UD section there is if you go to the section under you UT there is a subsection 167 00:15:54,870 --> 00:16:00,240 called initialization and the configuration and it gives the steps for initialize. 168 00:16:00,800 --> 00:16:01,250 OK. 169 00:16:01,280 --> 00:16:09,490 So now we've got our we've got our GPL you registers with regards that are you at. 170 00:16:09,750 --> 00:16:12,930 And now let's take a look at the other registers. 171 00:16:12,930 --> 00:16:18,300 We would need to enable to you but we would need to sort of configure certain you registers. 172 00:16:18,510 --> 00:16:24,090 We would need to configure that you at in transmit mode or receive mode or both. 173 00:16:24,090 --> 00:16:32,250 We would need to decide d the data length we need to decide whether we are using FIFO or not we'd need 174 00:16:32,250 --> 00:16:34,190 to decide whether we use an interrupt or not. 175 00:16:34,200 --> 00:16:41,250 And we need to enable the EU at all the stuff we do them using the other registers so I'm going to come 176 00:16:41,250 --> 00:16:54,150 up here and search you are to gain control if you add and brings us here and then I'm gonna go to register 177 00:16:54,150 --> 00:16:56,460 descriptions. 178 00:16:56,460 --> 00:16:58,910 So this is the you at the register. 179 00:16:58,930 --> 00:17:02,240 Do you at data register would need it. 180 00:17:02,250 --> 00:17:08,030 So what I'm gonna do is I'm going to create a symbolic name for that. 181 00:17:08,880 --> 00:17:19,760 I'm gonna come over here you at zero pace you need to grab you at zero base OK. 182 00:17:19,770 --> 00:17:22,110 Once we've cropped that you to zero 183 00:17:25,240 --> 00:17:29,760 once we've grabbed that we um we say you at zero. 184 00:17:30,100 --> 00:17:30,890 Um. 185 00:17:30,920 --> 00:17:33,440 These are just the name of the register. 186 00:17:33,480 --> 00:17:34,660 These are offset 187 00:17:37,380 --> 00:17:38,290 to you. 188 00:17:39,560 --> 00:17:43,700 And then they released the register itself you add zero. 189 00:17:44,070 --> 00:17:45,470 These are the score Ah. 190 00:17:45,610 --> 00:17:49,250 And this is simply the base plus the offset. 191 00:17:49,250 --> 00:17:52,880 You got zero base over here. 192 00:17:52,880 --> 00:17:55,010 Plus the TR offset. 193 00:17:56,930 --> 00:18:04,820 Okay so the scrubbed the um the offset is your X years you mean it is the same as the base address. 194 00:18:04,820 --> 00:18:06,010 No problem. 195 00:18:06,010 --> 00:18:10,310 But we have to find the base address the base address should be here. 196 00:18:11,450 --> 00:18:16,200 So over here get over here gives us the base address of our various You are modules. 197 00:18:16,220 --> 00:18:20,030 Look at that we've got seven different you are two modules. 198 00:18:20,030 --> 00:18:24,730 So I'm going to copy the base address from here. 199 00:18:24,800 --> 00:18:32,500 Highlight this control C to copy and paste it over here control feature paste. 200 00:18:32,560 --> 00:18:34,650 I'll clean this right. 201 00:18:34,730 --> 00:18:39,230 So we've got our you at data register. 202 00:18:39,400 --> 00:18:46,390 Um let's go and you can read more about this if you want. 203 00:18:46,470 --> 00:18:50,770 Um let's go see if we have that important registers. 204 00:18:50,780 --> 00:18:53,090 Of course we need more registers. 205 00:18:53,190 --> 00:18:59,770 We need to deal with at least eight registers. 206 00:18:59,830 --> 00:19:02,000 This is the you at Flag register. 207 00:19:02,020 --> 00:19:07,030 So this we would need to check whether the transmit flag said they receive flag sets et cetera. 208 00:19:07,060 --> 00:19:08,270 So this is unimportant. 209 00:19:08,270 --> 00:19:09,700 Register. 210 00:19:09,700 --> 00:19:15,100 I'm going to copy this symbolic name and then I'm going to copy the offset sorry and then I'm going 211 00:19:15,100 --> 00:19:18,460 to create a symbolic name for the register. 212 00:19:19,980 --> 00:19:31,270 So I'm gonna see you at zero f r register f r offset as you say offset can you already copy this 213 00:19:34,190 --> 00:19:46,770 or simply paste this over here and then you add zero far the register queue you as the um the base your 214 00:19:46,770 --> 00:19:53,830 zero base plus the offset like this. 215 00:19:55,350 --> 00:19:56,840 Okay. 216 00:19:57,570 --> 00:19:58,870 Let's move on. 217 00:19:59,370 --> 00:20:00,590 Okay. 218 00:20:01,080 --> 00:20:08,230 So we will be taking a look at the T X R X flags bits number form bits number five. 219 00:20:08,250 --> 00:20:12,900 We would monitor these flags to see whether there is receive or transmit to flag. 220 00:20:13,040 --> 00:20:17,700 They did receive or transmit flags asset or whether you are too busy. 221 00:20:17,700 --> 00:20:27,890 So when we start creating symbolic names for these t x f f and our x f f or f e then should know we 222 00:20:27,890 --> 00:20:30,730 are talking about this but we'll talk about that later. 223 00:20:30,780 --> 00:20:39,270 So we would use t x f e to check if you transmit FIFO is empty t x f f t check if the U receive FIFO 224 00:20:39,270 --> 00:20:42,910 is full right. 225 00:20:43,540 --> 00:20:48,030 And then there is the receive FIFO and then there is the trust me FIFO fool. 226 00:20:48,120 --> 00:20:50,940 And then there is receive FIFO empty. 227 00:20:51,330 --> 00:20:54,490 Like I said I'll show you. 228 00:20:54,790 --> 00:20:55,310 Right. 229 00:20:55,560 --> 00:20:59,850 I spoke about the um the section on initialization on the configuration. 230 00:21:00,150 --> 00:21:06,270 Okay so over here if you want to read more about a US or if I'm saying something and you don't quite 231 00:21:06,300 --> 00:21:13,570 grasp it they provide initialization and configuration steps here step by step for doing what we are 232 00:21:13,750 --> 00:21:18,800 we are gonna do so you can spend some time reading this if it's not so clear. 233 00:21:19,530 --> 00:21:24,240 And of course you can send me your questions if you have any questions you can send me a message or 234 00:21:24,240 --> 00:21:29,170 leave in the queue and a section but all of this is written here. 235 00:21:29,250 --> 00:21:32,310 I know this because I've read this stuff before. 236 00:21:33,270 --> 00:21:36,530 Yeah goodness. 237 00:21:36,930 --> 00:21:48,320 Let's go back to the top and look at you at Control F and we need to go to register descriptions Okay 238 00:21:49,720 --> 00:21:57,390 so we had just created a symbolic name for our flag register see other relevant threads. 239 00:21:57,390 --> 00:21:58,230 This will require 240 00:22:01,510 --> 00:22:03,740 this that you at low power register. 241 00:22:03,830 --> 00:22:05,510 Well we're not dealing with low power. 242 00:22:05,510 --> 00:22:09,890 No we get this on the day importance register this to you at integer baud rate device. 243 00:22:10,640 --> 00:22:15,680 So we would have to set the board rate of where you are to communication where we want the standard 244 00:22:15,740 --> 00:22:22,070 nine thousand six hundred or the other popular one of which is one hundred and fifteen thousand two 245 00:22:22,070 --> 00:22:26,150 hundred would have to said that and to set a broad rate to the two registers. 246 00:22:26,240 --> 00:22:31,890 There is the integer register and the fraction register so we need to get this register. 247 00:22:32,120 --> 00:22:38,900 I'm gonna copy this and I'll show you how to calculate the portrait rate when we start calculating it. 248 00:22:39,560 --> 00:22:43,210 So I'll see you at 0. 249 00:22:43,520 --> 00:22:49,040 The name of the register is integer portrait IPD a P R. 250 00:22:49,130 --> 00:23:02,110 And then the offset for it copied it so simply pasted over here and we say you are 0 and I P R D the 251 00:23:02,370 --> 00:23:03,730 register. 252 00:23:04,020 --> 00:23:09,600 This is E Q You and it's simply the base address of you at 0. 253 00:23:11,310 --> 00:23:16,600 Sorry but the plus the offsets over here. 254 00:23:17,230 --> 00:23:18,690 Okay. 255 00:23:19,560 --> 00:23:20,350 Right. 256 00:23:20,430 --> 00:23:27,790 Let's go to the next one the next one should be the fraction 1 so we would have to. 257 00:23:27,880 --> 00:23:33,670 Okay we just explained this while we are here would have to write to the board rate integer part here 258 00:23:34,780 --> 00:23:40,960 the first sixteen bits of this that two bits register is the part where we started the the board rate 259 00:23:41,200 --> 00:23:46,660 the board rate is going to be it is going to have a hole number in a fraction we take the whole number 260 00:23:46,660 --> 00:23:52,210 and we put it here in the first sixteen bit of this register the fraction bit is going to be stored 261 00:23:52,210 --> 00:23:55,070 in d You are the fractional board reach device. 262 00:23:55,570 --> 00:24:00,070 And this the um this the offsets for that register so I'm going to copy this and create a symbolic name 263 00:24:00,070 --> 00:24:00,520 for it 264 00:24:07,130 --> 00:24:08,150 you 0 265 00:24:11,790 --> 00:24:28,070 F P R D offset it Q you this is it and then the name of the registers you at zero P R D on a score r 266 00:24:28,660 --> 00:24:33,880 and you know this by now simply base address 267 00:24:37,220 --> 00:24:39,110 plus the offset 268 00:24:43,030 --> 00:24:50,230 K control C control V right. 269 00:24:50,690 --> 00:24:52,650 Okay let's see. 270 00:24:53,070 --> 00:24:53,320 Okay. 271 00:24:53,350 --> 00:24:59,730 Our next register is the line control register and this is the register that we shall use to sort of 272 00:24:59,880 --> 00:25:07,140 configure the day length whether we want 8 bit wet lint or 7 bits would need this register to figure 273 00:25:07,140 --> 00:25:12,310 out the data length psychopathy the offset and come in created 274 00:25:17,450 --> 00:25:30,720 you at zero line control register it's often written us LC Ah h right let's see yeah it's written us 275 00:25:30,860 --> 00:25:33,230 DLC Ah h okay 276 00:25:37,100 --> 00:25:37,700 offset 277 00:25:40,990 --> 00:25:55,620 a you this the offset and we can create the register you are 0 LC RH R for the register P Q You we grew 278 00:25:55,620 --> 00:26:03,480 up the base address and pasted over here we are to the offset as well. 279 00:26:03,510 --> 00:26:17,430 Copy paste it over here okay see you on next register is that you control register and we shall use 280 00:26:17,430 --> 00:26:23,130 this to enable and disable what are you not going to copy the offset from here 281 00:26:26,990 --> 00:26:36,210 you at zero control register CTO we call this this is the offset queue you 282 00:26:40,130 --> 00:26:44,120 CTO to register itself. 283 00:26:44,240 --> 00:26:44,890 Q You 284 00:26:47,900 --> 00:26:51,740 this is base pays 285 00:26:54,920 --> 00:26:55,750 plus offset. 286 00:27:01,130 --> 00:27:02,140 Right. 287 00:27:02,520 --> 00:27:07,550 Okay so we'll need at a register since we'll be talking about interrupts. 288 00:27:07,590 --> 00:27:13,220 How about we just add the registers that would help us with enabling you to interrupt in other things. 289 00:27:13,250 --> 00:27:18,810 So just go ahead and art or relevance register so that the next time we talk about you but we wouldn't 290 00:27:18,810 --> 00:27:28,830 need to add any you know any new registers who we wouldn't need to create symbolic names for registers. 291 00:27:28,830 --> 00:27:37,740 So yeah with this we would we would just need to check our sort of status register. 292 00:27:37,740 --> 00:27:45,570 We just need to add other registers to check the status whether you know it should be called a status 293 00:27:45,570 --> 00:27:46,730 register. 294 00:27:46,970 --> 00:27:47,470 Anyway. 295 00:27:47,640 --> 00:27:52,370 Let's just add all registers that we need for you at our X T X and interrupt. 296 00:27:52,410 --> 00:27:58,480 So that when we're dealing with other topics when you we wouldn't need to add in a Fed registers. 297 00:27:58,500 --> 00:28:06,690 Okay so I'm going to go ahead and look for more registers that I think will be relevant to us 298 00:28:09,370 --> 00:28:10,490 okay. 299 00:28:10,510 --> 00:28:12,440 Register 4 5 4 level select. 300 00:28:12,580 --> 00:28:15,080 We wouldn't need this. 301 00:28:15,220 --> 00:28:16,340 Okay. 302 00:28:16,640 --> 00:28:19,880 Interrupt mask this unimportant to reduce that for interrupts. 303 00:28:19,910 --> 00:28:24,630 I'm gonna copy this creates a symbolic name for it. 304 00:28:25,300 --> 00:28:26,050 You had zero 305 00:28:28,980 --> 00:28:34,310 I m offset Q you 306 00:28:37,440 --> 00:28:39,070 you are at zero. 307 00:28:39,630 --> 00:28:53,580 I m r a Q You assume zero days plus I am offset. 308 00:28:53,580 --> 00:28:54,470 Right. 309 00:28:54,570 --> 00:28:55,160 Moving on 310 00:29:01,830 --> 00:29:06,910 let's see we saw one which we got to fight for we may need to experiment with this. 311 00:29:07,410 --> 00:29:12,290 Um I'm gonna create a symbolic name for the interrupt FIFO level select as well. 312 00:29:12,310 --> 00:29:12,930 Copy this. 313 00:29:19,070 --> 00:29:20,250 You got zero. 314 00:29:20,990 --> 00:29:28,240 I f and this offset a Q you. 315 00:29:28,240 --> 00:29:29,620 This is it. 316 00:29:29,970 --> 00:29:45,800 And then you add zero I f Ellis and the score R E Q You is the base you add zero base plus the offset 317 00:29:46,580 --> 00:29:50,120 this one over here like this. 318 00:29:50,200 --> 00:29:55,700 Okay moving on the C the C 319 00:30:02,680 --> 00:30:04,490 Okay. 320 00:30:05,800 --> 00:30:06,040 Okay. 321 00:30:06,040 --> 00:30:10,810 So this the U S ALL RIGHT AS row interrupts that is registered. 322 00:30:10,960 --> 00:30:12,050 Definitely useful. 323 00:30:12,100 --> 00:30:13,290 I'm gonna copy the offset. 324 00:30:15,770 --> 00:30:17,180 Come over here. 325 00:30:17,570 --> 00:30:23,870 You had zero arrays offset it. 326 00:30:23,990 --> 00:30:27,470 Q You pasted that here. 327 00:30:27,610 --> 00:30:34,100 You had zero arise are you. 328 00:30:34,180 --> 00:30:39,460 Q You as the base you had zero base 329 00:30:43,380 --> 00:30:47,230 plus the offset this one over here. 330 00:30:47,550 --> 00:30:49,320 Patient over here. 331 00:30:49,950 --> 00:30:50,540 Right. 332 00:30:50,540 --> 00:30:51,090 Moving on 333 00:30:54,640 --> 00:30:55,340 screwed down. 334 00:31:01,660 --> 00:31:04,610 This is most. 335 00:31:05,050 --> 00:31:12,200 Interrupt studies we um we sorted this register out did we not. 336 00:31:12,200 --> 00:31:16,920 0 x 4 0 okay. 337 00:31:18,160 --> 00:31:22,310 Okay we can leave that one out. 338 00:31:22,580 --> 00:31:23,790 Um let's see. 339 00:31:23,850 --> 00:31:25,180 Okay here we go. 340 00:31:28,250 --> 00:31:28,440 Okay. 341 00:31:28,450 --> 00:31:31,300 This unimportant want the register. 342 00:31:31,750 --> 00:31:33,570 I see our register as the interrupt. 343 00:31:33,580 --> 00:31:34,390 Claire register. 344 00:31:34,480 --> 00:31:39,340 Okay this is going to be useful Claire and interrupt. 345 00:31:39,340 --> 00:31:43,240 So come over here. 346 00:31:43,380 --> 00:31:46,840 You at 0 ICR offset 347 00:31:49,560 --> 00:32:02,040 you Q you then you at 0 ICR Are you Q You the base 348 00:32:06,270 --> 00:32:09,300 plus the offset ICR offsets here like this 349 00:32:12,390 --> 00:32:13,510 right. 350 00:32:13,530 --> 00:32:16,420 So I think we have enough registers. 351 00:32:16,710 --> 00:32:20,250 Okay let's hope we've not missed an important register. 352 00:32:20,450 --> 00:32:20,790 Right. 353 00:32:20,820 --> 00:32:26,370 So now we are going to create symbolic names for the various constants that we shall be right into the 354 00:32:26,370 --> 00:32:27,970 various registers. 355 00:32:27,990 --> 00:32:36,360 So for instance to enable the um the U to module we may need to set bits number maybe bits number 1 356 00:32:36,750 --> 00:32:40,920 to 1 we may need to set the PIN number 2 to 1 or something. 357 00:32:41,240 --> 00:32:46,470 We are going to create a constant 2 Hope is such that we just write it constants to make liquid more 358 00:32:46,470 --> 00:32:46,950 readable. 359 00:32:46,980 --> 00:32:50,620 And you know what I'm talking about because we did it for the other lessons. 360 00:32:50,820 --> 00:32:52,860 So let's do that now. 361 00:32:52,890 --> 00:32:58,900 Okay so let's start which creates a constant for check in if the receive FIFO is empty. 362 00:32:59,100 --> 00:33:02,730 I'm going to call this you at 363 00:33:05,900 --> 00:33:11,160 you out and we're going to be applying this to the um the flag register. 364 00:33:11,160 --> 00:33:18,180 So we'll say f our and then our rigs will receive and then f for FIFO and E for empty. 365 00:33:18,180 --> 00:33:27,790 And this basically will be to perform an end operation with um pit number five set to um 2 1. 366 00:33:27,960 --> 00:33:32,250 And this is what it looks like in hexadecimal form right. 367 00:33:32,250 --> 00:33:38,400 If you explained this this hexadecimal number you see that bits number five is what is set to 1 in the 368 00:33:38,410 --> 00:33:39,570 entire 32 bit 369 00:33:44,460 --> 00:33:45,840 receive FIFO empty 370 00:33:55,680 --> 00:33:56,310 okay. 371 00:33:56,340 --> 00:34:03,740 The next one is going to be a constant to set our data lines to 2 8 bit. 372 00:34:04,110 --> 00:34:05,490 So I'm gonna see you at 373 00:34:08,470 --> 00:34:11,750 and that the register will apply this to use the line control register. 374 00:34:11,780 --> 00:34:13,260 LCR H. 375 00:34:13,630 --> 00:34:19,360 And we're going to say the word lent w lend to 8. 376 00:34:19,360 --> 00:34:21,660 Q You and the constant is this 377 00:34:26,660 --> 00:34:27,290 this means 378 00:34:30,600 --> 00:34:43,610 each bit word length right the next one will be to enable the EU to vie for to anybody you are to fight 379 00:34:43,610 --> 00:34:44,540 for. 380 00:34:44,710 --> 00:34:55,060 We would need to access the um the line control register so I'm gonna stop you out of line control register 381 00:34:55,450 --> 00:34:59,180 again and five enable. 382 00:34:59,680 --> 00:35:02,310 It's gonna be equal you know. 383 00:35:02,370 --> 00:35:10,640 Um the hexadecimal is basically set in between number five and the 32 bit to register certain bits. 384 00:35:10,650 --> 00:35:11,560 Number four sorry. 385 00:35:11,560 --> 00:35:12,630 This is bits number four. 386 00:35:12,640 --> 00:35:20,750 If you explain this this is this one hexadecimal digits would give us four binary digits. 387 00:35:21,370 --> 00:35:28,450 And this one here is it's 1 0 0 0 right. 388 00:35:28,460 --> 00:35:34,400 But because we count from zero this one would end up corresponding to bits number 4 or bits number five 389 00:35:34,570 --> 00:35:39,550 is the fifth bit but because we come from zero it's bit number four. 390 00:35:39,570 --> 00:35:41,720 And so this is for 391 00:35:45,240 --> 00:35:48,510 enable 5 4. 392 00:35:49,320 --> 00:35:52,670 Okay the next one will be to um to enable the U. 393 00:35:52,910 --> 00:35:55,820 And this one we going to access to you utter control register. 394 00:35:55,880 --> 00:36:01,760 So see you UT CTO you're right. 395 00:36:01,820 --> 00:36:10,100 E N E Q You and this is basically set in bits number 0 2 1 396 00:36:16,610 --> 00:36:28,070 enable you to write the next one here is to check if they receive five full time all total kid and I'm 397 00:36:28,070 --> 00:36:37,910 simply going to do you what I m because we're gonna apply that to the I am register interrupt mosque 398 00:36:39,990 --> 00:36:45,200 and then I'm gonna see our t i m e q u 399 00:36:54,360 --> 00:36:59,680 right. 400 00:36:59,940 --> 00:37:08,400 Okay so now we have done a into symbolic names and we shall stop developing a try find a next lesson. 401 00:37:08,460 --> 00:37:09,570 So I'll see you in the.