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Hello.

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Welcome back.

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So let's write to a driver.

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I'm gonna start off by putting my directives

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just pitch them here like this.

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And

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it just creates a bit of space on here.

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And on the score on the score Main and we start off by

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enabling know what GPL you Bill GPL you win it and then what I'm gonna do is um could you post the video

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and try to implement the GPL you in its subroutine on your own.

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And once you are done you can on post it and we do it together.

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Okay.

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Now let's see how that is done.

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We've done this on multiple occasions.

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So this is the name of the subroutine.

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I'm gonna start off by

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by enabling DRM the clock access to Q You f first would do this and then think I'm gonna do this faster.

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Load

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as you are one and then we perform all

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our zero hours zero then GPL you F E N and then we store our 0 0 1 and then we wait for a while by using

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n o p.

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Once that is done the direction register we're gonna use GPL U.

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Um I'm gonna use the red LCD here so I'm gonna do a load of the line.

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This would be

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when I do load R 1

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GPL you f d I register the

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and then load r 0 are 1 and then all

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hours you 5 0

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Libby red

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and then store a zero hour one like this.

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So this was said the red pen as output next week and digitally enabled a pin load.

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Load one

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next we do digital in April by access and the digital enabled register.

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And on this score.

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Ah.

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And then load

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our zero hour one and then all our zero hours zero

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the only Democrat pin and then we store

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our zero hour one.

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Then this is done we can return from the subroutine

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right.

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So next.

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Well we have to do is implement the.

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They cannot function to initialize the cystic timer.

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Okay.

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So once we once we enable what you call you would enable our system timer so we branch to be a

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stick on us go in it.

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So I'm gonna copy this then come here.

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So stick in it.

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So first what we do is we um what you say about a cystic timeout before we change anything.

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It is advisable to disable it so I'm gonna do.

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Load our one and then I'm going to so uh select the cystic control register that is where we enable

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and disable the.

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I'm gonna move zero into our zero

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and then I'm gonna put that into the system control register by saying install our 0 are 1 like this.

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Right.

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Once we've disabled it we going to load the maximum value to devalue into the um the reload register.

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D you x 0 0 f f f f so I'm gonna do it.

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Load R 1 course and Vic

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t reload

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and then I'm gonna load r 0 and there's just going to be the constant s one over here.

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Put this into our 0 and then I'm gonna do store r zero R 1.

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Okay so once that is done we need to clear a cystic current register and to clear this as the car register

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we will need to write a new value into that register so we can simply write C with the m gonna do load

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R 1 and Vic SD current score R then move

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our 0 Number 0 and then store our 0 r 1 right.

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So once that is done we can enable our cystic timer to load by 1.

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I'm gonna go back to the cystic control register by doing n fake SD c t RL on a score R and then

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I'm going to select a clock source as well as enable it all in this block.

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Gonna do move our 0.

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I'm gonna do with a constant for enabling this one here.

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It's like performing an operation twice a C plus then I'm gonna do a clock source

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like this once this is done I'm gonna do move r 0

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now I've already done move of store

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our 0 r 1 and then B x A law okay.

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Looks good.

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So in the next lesson we going to implement the cystic weight subroutines.

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These are what DeLay subroutines will see in the next.